SLLA578 June   2022 TLIN1431-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Startup
    1. 1.1 Operational Voltages
    2. 1.2 Power-Up and INIT Mode
  4. 2Pin Control
    1. 2.1 Typical Application
    2. 2.2 Power-Up into Normal Mode in Pin Control
      1. 2.2.1 Restart Mode from INIT Mode in Pin Control
      2. 2.2.2 Standby Mode from Restart Mode in Pin Control
      3. 2.2.3 Normal Mode in Pin Control
    3. 2.3 Power-Up into Fast Mode in Pin Control
    4. 2.4 Sleep Mode to Normal Mode in Pin Control
    5. 2.5 Fail-Safe Mode to Normal Mode in Pin Control
  5. 3SPI Control
    1. 3.1 Typical Application
    2. 3.2 Power-Up into Normal Mode in SPI Control
      1. 3.2.1 Restart Mode from INIT Mode in SPI Control
      2. 3.2.2 Standby Mode from Restart Mode in SPI Control
      3. 3.2.3 Normal Mode in SPI Control
    3. 3.3 Power-Up into Fast Mode in SPI Control
    4. 3.4 Sleep Mode to Normal Mode in SPI Control
    5. 3.5 Fail-Safe Mode to Normal Mode in SPI Control
    6. 3.6 Configuring Watchdog through SPI
  6. 4Pin Assignments in Pin Control vs. SPI Control
  7. 5References

1.2 Power-Up and INIT Mode

As the VSUP input is ramping up from off to steady-state, it will pass through two different thresholds of the TLIN1431-Q1. The first is the rising power-on reset threshold (VnPORR), and the second is the rising VSUP under-voltage threshold (UVSUPR). Each of these thresholds enables various circuits in the device to initialize.

After passing the VnPORR threshold, the digital circuitry and internal clocks initialize. Once VSUP exceeds UVSUPR, the LDO begins ramping until it reaches the rising VCC under-voltage threshold (UVCC3R or UVCC5R), at which point the device will enter INIT mode. Figure 1-4 shows a state diagram of the TLIN1431-Q1 during power-up.

Figure 1-4 INIT Mode State Diagram

Also, during this mode, the device detects the state of the WKRQ/INH pin. During this detection, up to 1.6 V can be seen on the pin as shown in Figure 2-2 and Figure 3-2.

The device exits INIT mode based upon the state of the PIN/nCS pin. Section 2 describes the power-up process in pin control, and Section 3 describes the power-up process in SPI control.

Whenever the device experiences a VSUP drop to a level below UVSUPF (known as VSUP “brownout”), the device will repeat the power-up sequence, shown as “POR” in Figure 1-4. The brownout sequence is shown in Figure 1-5.

Figure 1-5 Brownout below VnPORF