SLLSF21D September   2018  – February  2020

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics: Driver
    10. 6.10 Electrical Characteristics: Receiver
    11. 6.11 Supply Current Characteristics: Side 1(ICC1)
    12. 6.12 Supply Current Characteristics: Side 2(ICC2)
    13. 6.13 Switching Characteristics: Driver
    14. 6.14 Switching Characteristics: Receiver
    15. 6.15 Insulation Characteristics Curves
    16. 6.16 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Electromagnetic Compatibility (EMC) Considerations
      2. 8.3.2 Failsafe Receiver
      3. 8.3.3 Thermal Shutdown
      4. 8.3.4 Glitch-Free Power Up and Power Down
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device I/O Schematics
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Data Rate and Bus Length
        2. 9.2.2.2 Stub Length
        3. 9.2.2.3 Bus Loading
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resource
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Supply Current Characteristics: Side 1(ICC1)

 Bus loaded or unloaded (over recommended operating conditions unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DRIVER ENABLED, RECEIVER DISABLED
Logic-side supply current VD = VCC1, VCC1 = 5 V ± 10% 2.6 4.4 mA
Logic-side supply current VD = VCC1, VCC1 = 3.3 V ± 10% 2.6 4.4 mA
Logic-side supply current D = 1Mbps square wave with 50% duty cycle, VCC1 = 5 V ± 10% 3.2 5.1 mA
Logic-side supply current D = 1Mbps square wave with 50% duty cycle, VCC1 = 3.3 V ± 10% 3.2 5.1 mA
DRIVER ENABLED, RECEIVER ENABLED
Logic-side supply current VRE = VGND1, VD = VCC1, VCC1 = 5 V ± 10% 2.6 4.4 mA
Logic-side supply current VRE = VGND1, VD = VCC1, VCC1 = 3.3 V ± 10% 2.6 4.4 mA
Logic-side supply current VRE = VGND1, D = 1Mbps square wave with 50% duty cycle, VCC1 = 5 V ± 10%, CL(R)(1) = 15 pF 3.4 5.2 mA
Logic-side supply current VRE = VGND1, D= 1Mbps square wave with 50% duty cycle, VCC1 = 3.3 V ± 10%, CL(R)(1) = 15 pF 3.2 5.2 mA
DRIVER DISABLED, RECEIVER ENABLED
Logic-side supply current V(A-B) ≥ 200 mV, VD = VCC1, VCC1 = 5 V ± 10% 1.5 3.1 mA
Logic-side supply current V(A-B) ≥ 200 mV, VD = VCC1, VCC1 = 3.3 V ± 10% 1.5 3.1 mA
Logic-side supply current (A-B) =1Mbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 5 V ± 10%, CL(R)(1) = 15 pF 1.7 3.2 mA
Logic-side supply current (A-B) = 1Mbps square wave with 50% duty cycle, VD = VCC1, VCC1 = 3.3 V ± 10%, CL(R)(1) = 15 pF 1.7 3.2 mA
DRIVER DISABLED, RECEIVER DISABLED
Logic-side supply current VDE = VGND1, VD = VCC1, VCC1 = 5 V ± 10% 1.5 3.1 mA
Logic-side supply current VDE = VGND1, VD = VCC1, VCC1 = 3.3 V ± 10% 1.5 3.1 mA
CL(R) is the load capacitance on the R pin.