SLLU326A May   2022  – June 2022 TLIN1431-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Features
    2. 1.2 Description
  4. 2EVM Setup and Features
    1. 2.1  Startup Mode Configurations
      1. 2.1.1 Pin and SPI Modes
      2. 2.1.2 Wake Request (WKRQ) vs. Inhibit Output (INH)
    2. 2.2  Commander and Responder Configurations
    3. 2.3  Local Wake-Up
    4. 2.4  Channel Expansion
    5. 2.5  VBAT Voltage Divider
    6. 2.6  Reset Input
    7. 2.7  Logic-Level LIMP and WAKE Signals
    8. 2.8  High-Voltage Signal Monitoring
    9. 2.9  TXD and RXD
    10. 2.10 VCC Load Testing
    11. 2.11 SPI Interface
  5. 3Jumpers, Headers, Connectors, Test Points, and Switches
  6. 4Bill of Materials
  7. 5Schematic

2 EVM Setup and Features

Use the following equipment to evaluate the performance of the TLIN1431-Q1:

  • Power supply capable of supplying the desired supply voltage. Typical LIN applications use 12 V or 24 V, but the TLIN1431-Q1 can operate with any supply voltage from 5.5 V to 28 V. Connect this voltage across the VBAT and GND pins of the J11 paired banana jack connector.

  • If the LIN bus interface is to be observed using an oscilloscope, use probes capable of tolerating voltages as large as VBAT.

  • The logic interface pins may interface to a microcontroller, pattern generator, or logic analyzer with logic levels matching the LDO VCC voltage, or a high-level voltage consistent with the VIH­ requirements of the device.

  • The LDO output can be used for testing load and thermal capabilities with a source meter or physical resistance connected between the jumper pins on J4 (pins 1 and 2) or any other VCC output pin or test point.

  • An external device to be controlled via the channel expansion functionality (accessed from J6 and J7) can be connected using jumper cables or wires as appropriate.