SLUAA84A January   2021  – February 2022 BQ769142 , BQ76942 , BQ76952

 

  1.   Trademarks
  2. Introduction
  3. Circuit Concepts
  4. Configuration
  5. Logic Level FETs
  6. FET Driver Implementation
  7. Transistor Driver Implementation
  8. Controlling LD
  9. Precharge and Predischarge for Low-Side FETs
  10. Summary
  11. 10References
  12. 11Revision History

Configuration

Data memory configuration must be set to use low-side FETs with the BQ769x2 devices. By default the FET drivers are off in the data memory, but the charge pump is enabled. DDSG and DCHG are also disabled. The Settings:FET:FET Options[FET_CTRL_EN] bit is set by default and must remain set for the BQ769x2 to control DCHG and DDSG. Changes will include:

  • Turn off the charge pump.
  • Enable REG1 to an appropriate voltage.
  • Enable the pre-regulator if used.
  • Set the DCHG and DDSG pins for output with the proper polarity for the drivers used.
  • Enable the FETs by setting data memory or with the FET_ENABLE command when desired.

The following settings show an example of changes for basic low-level testing with 3.3-V REG1 and DCHG and DDSG high when on.


Settings:Configuration:REG12 Config     0x0D
Settings:Configuration:REG0 Config      0x01
Settings:Configuration:DCHG Pin Config  0xA2
Settings:Configuration:DDSG Pin Config  0xA2
Settings:FET:Chg Pump Control           0x00

Additional configuration for cells used and the desired device operation are needed. In testing for this application report additional changes were made for protection conditions. FETs were enabled as needed, SLEEP was generally disabled so the CHG would not switch with SLEEP.

An example circuit configuration for the BQ76952 is shown in Figure 3-1, this circuit is common for the driver options described in this application report. The charge pump is not used and CP1 is tied to BAT, so the BQ769x2 will draw the extra current noted in the data sheeet until the charge pump is disabled in the configuration. DSG and CHG are not used and are left open. PACK is pulled up with 10 kΩ. Both regulators are shown connected although only REG1 is used in testing. DDSG and DCHG are used for output and are not available for other functions. The schematic shows 16 cell support but should be configured for the cell count required. Testing for this application report was conducted at 40 V.

Figure 3-1 BQ76952 Monitor Schematic for Low-Side Switching