SLUAAP7 January   2024 BQ76905 , BQ76907

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Cell Balancing Circuit Considerations
    1. 2.1 Internal Cell-Balancing Circuit Design
    2. 2.2 External Cell-Balancing Circuit Design Using N-Channel FETs
    3. 2.3 External Cell-Balancing Circuit Design Using BJTs
  6. 3Considerations for a Host-Balancing Algorithm
  7. 4Timing Information
  8. 5Debugging Common Issues With Cell Balancing
    1. 5.1 Using a Resistor Divider as a Cell Simulator
    2. 5.2 Cell Balancing Troubleshooting
  9. 6Summary
  10. 7References

2 Cell Balancing Circuit Considerations

Cell balancing of a particular cell consists of enabling an integrated FET switch across the cell. The balancing current is determined by value of the input filter resistors selected when using internal balancing. Field Effect Transitors (FETs) or Bipolar Junction Transistors (BJT) can be used to increase the balance current in applications where the internal balancing current may not be sufficient.

Internal balancing, external balancing with N-channel FETs, and external balancing with BJTs are discussed in this section. Considerations for power dissipation and timing is also discussed.