SLUS696C June   2006  – February 2019 BQ26100

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Standard Serial Communication (SDQ) Timing
    7. 6.7 OTP Programming Specifications
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Non-Volatile Memory
      2. 7.3.2 Authentication
      3. 7.3.3 Communication and Power
    4. 7.4 Device Functional Modes
      1. 7.4.1 Profile Command
      2. 7.4.2 Sleep Mode Description
    5. 7.5 Programming
      1. 7.5.1 Communicating with the bq26100 Device
      2. 7.5.2 Memory Descriptions
        1. 7.5.2.1 Non-Volatile OTP Memory
          1. 7.5.2.1.1 General Use – Memory Function Commands 0xF0 (Read) and 0x0F (Write)
          2. 7.5.2.1.2 General Use — Memory Function Commands 0xFA (Read) and 0xAF (Write)
          3. 7.5.2.1.3 Status – Memory Function Commands 0xAA (Read) and 0x55 (Write)
            1. 7.5.2.1.3.1 PAGE LOCK (offset = D431h) [reset = 0h]
              1. Table 5. PAGE LOCK Field Descriptions
        2. 7.5.2.2 Non-Volatile EEPROM Memory
          1. 7.5.2.2.1 General Use – Memory Function Commands 0xE0 (Read) and 0x0E (Write)
      3. 7.5.3 SHA-1 Description
      4. 7.5.4 Key Programming Description
    6. 7.6 Register Maps
      1. 7.6.1 Volatile Register Memory
        1. 7.6.1.1 Message and Digest Registers – Memory Function Command 0xDD (Read) and 0x22 (Write)
        2. 7.6.1.2 Control and Version Registers – Memory Function Command 0x88 (Read) and 0x77 (Write)
          1. 7.6.1.2.1 CTRL Register (address = 0001h) [reset = 1h]
            1. Table 9. Control Register Field Descriptions
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Communicating with the bq26100 Device

The bq26100 device communication protocol starts when the host pulls the bus low for reset time. All devices on the bus are to respond with a presence pulse, which is active low. The host can then transmit the ROM Function command, which is used to address the devices on the bus. The ROM functions include Match ID, Skip ID, Read ID, and Search ID.

Match ID The host transmits the 64-bit ID of the 1-wire based device to communicate.
Skip ID No ID is necessary for communication. Used only if one device is connected to the host.
Read ID The 1-wire slave transmits its 64 bit address. This command is only useful if there is only one device connected to the host.
Search ID Useful if there are multiple devices on the bus. This command initiates a communication with a single device, but it is more useful in allowing the host to determine the address of every device on the bus. The Match ID can then be used to communicate with a specific addressed device.
bq26100 flow_cht_lus696.gifFigure 8. ROM Function Flow Chart

The 64-bit device ID is made up of an 8-bit family code, 48-bit random value, and a final 8-bit CRC (see Table 1).

Table 1. Format of 64-bit Device ID

ID MSB ID LSB
CRC (8 bits) Random Data (48 bits) Family Code (8 bits, defaults to 0x09)

Contact Texas Instruments if specific data should be programmed into the ID.

After the ROM function command is issued and the bq26100 device is selected, a Memory Function command can be issued. The Memory Function commands are Read Memory, Read EEPROM, Read Status, Read Page, Read Page 4, Read Digest, Read Control, Write Memory, Write Page 4, Write EEPROM, Write Status, Write Message, Write Control, and Profile.

Figure 9 shows the flow for the Memory Function selection. Figure 12 through Figure 15 illustrate the flow for each memory function.

bq26100 mem_flo_lus696.gifFigure 9. Memory Function Flow Chart

The SDQ protocol requires a CRC calculation as part of the communication flow. The CRC, based on a polynomial of x8+x5+x4+1, is computed to determine data integrity and its use varies in the protocol. The Memory Function flows show what data are shifted through the CRC and when the value is transmitted from the slave. Each data byte used in the CRC calculation is pushed through the CRC shift register from LSB to MSB. The byte wide CRC computation is:

for (i = 0; i < 8; i++) {
  if (crc[0] ^ input[i])
    crc = (crc >> 1) ^ 0x8C;
   else
     crc = crc >> 1;
}


Where did the magic number 0x8C come from? CRC polynomials are defined such that the highest order simply shows the number of bits, so x8+x5+x4+1 defines an 8-bit value with a binary value of 00110001 (bits 0, 4, and 5 are 1 and all others are 0). Since the SDQ CRC is computed by shifting in the LSB, the polynomial must be used in reverse bit order – binary 10001100 or hexadecimal 0x8C.

The CRC value is reset to 0 prior to the first byte being shifted through. The CRC is also reset when the CRC is shifted out as part of the SDQ protocol.

bq26100 com_otp_pro_lus696.gifFigure 10. bq26100 Device Communication to OTP Programming Pulse Diagram
bq26100 otp_pro_lus696.gifFigure 11. OTP Programming Pulse Detail