SLUUCR0A September   2023  – December 2023

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 I/O Information
    2. 2.2 Jumper Information
    3. 2.3 Equipment
    4. 2.4 Hardware Setup
  9. 3Software
    1. 3.1 Software Setup
    2. 3.2 Test Procedure
      1. 3.2.1 Initial Power Up
      2. 3.2.2 I2C Register Communication Verification
      3. 3.2.3 Charger Mode Verification
      4. 3.2.4 Boost Mode Verification
      5. 3.2.5 Helpful Tips
  10. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
      1. 4.2.1 PCB Layout Guidelines
    3. 4.3 Bill of Materials (BOM)
  11. 5Additional Information
    1.     Trademarks
  12. 6Revision History

2.1 I/O Information

Table 3-1 lists the input and output connections available on this EVM and their respective descriptions.

Table 2-1 EVM I/O Connections
Jack Description
J1(2) - VIN Positive rail of the charger input voltage
J1(1) - GND Ground
J2(1) - SYS Positive rail of the charger system output voltage, typically connected to the system load
J2(2) - GND Ground
J3(1) - VPMID Positive rail of the charger output voltage for power bank applications in reverse boost mode (OTG). This output also shares the rail with the VIN input rail in forward buck mode
J3(2)-GND Ground
J4(1) - BAT+ Positive rail of the charger battery input, connected to the positive terminal of the external battery
J4(2) -

TS

 Connection available for external thermistor if required
J4(3) - GND Ground
J5 Input source Micro B USB port
J6 I2C connector for the USB2ANY interface board
J7 I2C connector for the EV2400 interface board