SLUUCV8 October   2023 TPS4810-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Overview
    2. 2.2 General Configurations
      1. 2.2.1 Physical Access
      2. 2.2.2 Test Equipment and Setup
        1. 2.2.2.1 Power Supplies
        2. 2.2.2.2 Meters
        3. 2.2.2.3 Oscilloscope
        4. 2.2.2.4 Loads
  8. 3Implementation Results
    1. 3.1 Test Setup and Procedures
      1. 3.1.1 Power-up with EN Control
      2. 3.1.2 Overload and Short Circuit Protection Test
      3. 3.1.3 Short-Circuit Protection Diagnosis Test
      4. 3.1.4 Input Reverse Polarity Test
  9. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
    3. 4.3 Bill Of Materials (BoM)
  10. 5Additional Information
    1.     Trademarks

3.1.1 Power-up with EN Control

Use the following instructions to verify the power up profile of TPS48100-Q1.

  1. Connect the EN/UVLO pin (TP3) to ground.
  2. Enable the EN/UVLO to HIGH to verify the startup profile of BST, GATE and SRC.
GUID-20231008-SS0I-WZPW-KFTD-SJ2RC7PQJTHQ-low.png Figure 3-2 Start-Up Profile of Bootstrap Voltage with INP1=INP2 = GND, CBST = 470 nF
GUID-20231008-SS0I-HPBL-3PDG-TSXTK5T8741T-low.png Figure 3-3 Start-Up Profile with INP1=INP2 = HIGH, CBST = 470 nF