SNOAA71 June   2021 LMP7704-SP , OPA4277-SP

 

  1.   1
  2.   2
  3.   3
  4.   4
  5.   5
  6. 16
  7.   7
  8.   8
  9.   9

Design Notes

  1. Use low-tolerance resistors to achieve high DC CMRR performance. Mismatching of resistors can also lead to errors in gain and output accuracy.
  2. All resistors and capacitors must be verified space-grade for this design.
  3. Rg sets the gain of the input stage. R1a and R1b can be used to set the gain of the second stage (see Design Steps).
  4. Rf1 and Rf2 are nominally matched in this design. In general, Rf1 and Rf2 do not need to be matched – it may be desirable in some cases to have Rf1 and Rf2 unmatched so that the top amplifier and bottom amplifier in the input stage have different gains. For example, if Vcm is not at mid-supply but is closer to one of the rails, Rf1 and Rf2 can be tuned so that neither of the input stage amplifiers run out of headroom.
  5. Integrated instrumentation amplifiers normally have a fixed minimum gain. In addition to using an IA in high-gain configurations, constructing a discrete IA like this affords the flexibility to achieve any gain less than 1 V/V.
  6. High-value resistors can degrade the phase margin of the circuit and introduce additional noise in the circuit.
  7. Add an isolation resistor to the output stage to drive large capacitive loads.
  8. Linear operation is contingent upon the input common-mode and the output swing ranges of the discrete op amps used. For best performance, choose Vcm = (V+ + V–) / 2 (mid-supply).
  9. C2 along with R3 || R4 forms a low-pass filter with a corner frequency of 147.16 Hz.
  10. The Vref pin must be supplied by a low-impedance reference that can sink and source current, such as a buffer. Using a high-impedance reference, such as a resistor divider with no buffer, may result in a mismatch and degradation of CMRR.
  11. Vout_min is chosen as 0.2 V for this design to avoid nonlinearities associated with the output of LMP7704-SP swinging too close to the rail. If this design is done with a different op amp, be sure to check the data sheet to determine the minimum and maximum output values allowed.
  12. The LMP7704-SP supply voltage of 10 V was selected according the derating specifications provided by the National Aeronautics and Space Administration (NASA) in document EEE-INST-002 (April 2008) and the European Cooperation for Space Standardization (ECSS) in document ECSS-Q-ST-30-11C Rev.1 (4 October 2011). The documents specify an 80% and 90% derating of the absolute maximum supply voltage for linear ICs, respectively.
  13. This design can be implemented with a single 4-channel LMP7704-SP or a similar device. See Design Alternative Op Amp for a wider supply op amp (36 V). Note that the listed alternative device meets TID = 50 krad(Si).