SPRABV4H October   2021  – April 2024 SM320F28335-EP , SM320F28335-HT , TMS320F280023-Q1 , TMS320F280025-Q1 , TMS320F280025C-Q1 , TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F2802-Q1 , TMS320F28020 , TMS320F280200 , TMS320F28021 , TMS320F28022 , TMS320F28022-Q1 , TMS320F280220 , TMS320F28023 , TMS320F28023-Q1 , TMS320F280230 , TMS320F28026 , TMS320F28026-Q1 , TMS320F28026F , TMS320F28027 , TMS320F28027-Q1 , TMS320F280270 , TMS320F28027F , TMS320F28027F-Q1 , TMS320F28030 , TMS320F28030-Q1 , TMS320F28031 , TMS320F28031-Q1 , TMS320F28032 , TMS320F28032-Q1 , TMS320F28033 , TMS320F28033-Q1 , TMS320F28034 , TMS320F28034-Q1 , TMS320F28035 , TMS320F28035-EP , TMS320F28035-Q1 , TMS320F28050 , TMS320F28051 , TMS320F28052 , TMS320F28052-Q1 , TMS320F28052F , TMS320F28052F-Q1 , TMS320F28052M , TMS320F28052M-Q1 , TMS320F28053 , TMS320F28054 , TMS320F28054-Q1 , TMS320F28054F , TMS320F28054F-Q1 , TMS320F28054M , TMS320F28054M-Q1 , TMS320F28055 , TMS320F2806-Q1 , TMS320F28062 , TMS320F28062-Q1 , TMS320F28062F , TMS320F28062F-Q1 , TMS320F28063 , TMS320F28064 , TMS320F28065 , TMS320F28066 , TMS320F28066-Q1 , TMS320F28067 , TMS320F28067-Q1 , TMS320F28068F , TMS320F28068M , TMS320F28069 , TMS320F28069-Q1 , TMS320F28069F , TMS320F28069F-Q1 , TMS320F28069M , TMS320F28069M-Q1 , TMS320F28075 , TMS320F28075-Q1 , TMS320F28332 , TMS320F28333 , TMS320F28334 , TMS320F28335 , TMS320F28335-Q1 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S , TMS320F28P550SJ , TMS320F28P559SJ-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Programming Fundamentals
  6. 3ROM Bootloader
  7. 4Flash Kernel A
    1. 4.1 Implementation
      1. 4.1.1 Application Load
  8. 5Flash Kernel B
    1. 5.1 Implementation
      1. 5.1.1 Packet Format
      2. 5.1.2 CPU1 Kernel Commands
      3. 5.1.3 CPU2 Kernel Commands
      4. 5.1.4 Packet Data
      5. 5.1.5 Status Codes
    2. 5.2 F2838x SCI Flash Kernels
      1. 5.2.1 CPU1-CPU2 Kernels
        1. 5.2.1.1 Kernel Commands
      2. 5.2.2 CPU1-CM Kernels
        1. 5.2.2.1 Kernel Commands
      3. 5.2.3 Using the Projects With SCI Bootloader
        1. 5.2.3.1 CPU1-CPU2
        2. 5.2.3.2 CPU1-CM
      4. 5.2.4 Using the Projects With Code Composer Studio (CCS) Software
        1. 5.2.4.1 CPU1-CPU2
        2. 5.2.4.2 CPU1-CM
    3. 5.3 F28P65x SCI Flash Kernel
      1. 5.3.1 CPU1 Kernel
        1. 5.3.1.1 Host-Kernel Communication: ControlCard
        2. 5.3.1.2 Host-Kernel Communication: LaunchPad Development Kit
        3. 5.3.1.3 Kernel Commands
      2. 5.3.2 Using the Projects With SCI Bootloader
        1. 5.3.2.1 CPU1
      3. 5.3.3 Using the Projects With CCS
        1. 5.3.3.1 CPU1
    4. 5.4 F28P55x SCI Flash Kernel
      1. 5.4.1 Implementation
        1. 5.4.1.1 Specifying the Flash Banks and Sectors of the Application
      2. 5.4.2 Kernel
      3. 5.4.3 Using the Project With SCI Bootloader
      4. 5.4.4 Using the Project with CCS
  9. 6Example Implementation
    1. 6.1 Device Setup
      1. 6.1.1 Flash Kernels
      2. 6.1.2 Hardware
    2. 6.2 Host Application: serial_flash_programmer
      1. 6.2.1 Overview
      2. 6.2.2 Building and Running serial_flash_programmer Using Visual Studio
      3. 6.2.3 Running serial_flash_programmer for F2806x (Flash Kernel A)
      4. 6.2.4 Running serial_flash_programmer for F2837xD (Flash Kernel B)
    3. 6.3 Host Application: Firmware Updates on F28004x With SCI Flash Kernel
      1. 6.3.1 Overview
      2. 6.3.2 Boot Pin Configurations
      3. 6.3.3 Using Three Boot Modes
      4. 6.3.4 Performing Live Firmware Updates
  10. 7Troubleshooting
    1. 7.1 General
    2. 7.2 SCI Boot
    3. 7.3 F2837x
      1. 7.3.1 F2837xS
      2. 7.3.2 F2837xD
      3. 7.3.3 F2837xD LaunchPad™
    4. 7.4 F28P65x
  11. 8References
  12. 9Revision History

5.2.2.1 Kernel Commands

CPU1 has two new commands for the F2838x SCI Flash Kernels, they are listed in Table 5-10.

Table 5-10 CPU1 Kernel Commands
Kernel Command Command Code Description
Run CPU1 Load CM 0x0030 1. Receive the packet with 32 bit address.
2. Release Flash Pump and set boot mode via IPC for CM.
3. Write CM kernel to CM RAM via CPU1 to CM IPC Message RAM.
4. Wait for CM signal and perform SCI function for CM when requested.
5. Branch to address.
Reset CPU1 Load CM 0x0040 1. Receive the packet with 32 bit address.
2. Release Flash Pump and set boot mode via IPC for CM.
3. Write CM kernel to CM RAM via CPU1 to CM IPC Message RAM.
4. Wait for CM signal and perform SCI function for CM when requested.
5. Break the while loop and enable WatchDog Timer to time-out and reset.

The CM commands are as listed in Table 5-11.

Table 5-11 CM Kernel Commands
Kernel Command Command Code Description
DFU CM 0x0050 1. Receive the packet with no data.
2. Receive the flash application byte-by-byte in boot hex format.
3. Selective Erase, Program, and Verify.
4. Send status packet.
If successful, the address sent in the status packet is the entry point address of the programmed flash application.
Erase CM 0x0060 1. Receive the packet with 32-bit data.
2. Selective erase the sectors specified in the data.
3. Send status packet.
Verify CM 0x0070 1. Receive the packet with no data.
2. Receive the flash application byte-by-byte in boot hex format.
3. Receive the flash application byte-by-byte in boot hex format.
4. Send status packet.
CM Unlock Zone 1 0x0080 1. Receive the packet with 128-bit data.
2. Write the password to the DCSM Key Registers.
3. Check to see if Zone 1 is unlocked.
4. Send status packet.
CM Unlock Zone 2 0x0090 1. Receive the packet with 128-bit data.
2. Write the password to the DCSM Key Registers.
3. Check to see if Zone 2 is unlocked.
4. Send status packet.
Run CM 0x00A0 1. Receive the packet with a 32-bit address.
2. Branch to the 32-bit address.
Reset CM 0x00B0 1. Receive the packet with no data.
2. Break the while loop and enable WatchDog Timer to time-out and reset.