SPRU514Z July   2001  – October 2023 SM320F28335-EP

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Notational Conventions
    3.     Related Documentation
    4.     Related Documentation From Texas Instruments
    5.     Trademarks
  3. Introduction to the Software Development Tools
    1. 1.1 Software Development Tools Overview
    2. 1.2 Compiler Interface
    3. 1.3 ANSI/ISO Standard
    4. 1.4 Output Files
    5. 1.5 Utilities
  4. Using the C/C++ Compiler
    1. 2.1  About the Compiler
    2. 2.2  Invoking the C/C++ Compiler
    3. 2.3  Changing the Compiler's Behavior with Options
      1. 2.3.1  Linker Options
      2. 2.3.2  Frequently Used Options
      3. 2.3.3  Miscellaneous Useful Options
      4. 2.3.4  Run-Time Model Options
      5. 2.3.5  Symbolic Debugging and Profiling Options
      6. 2.3.6  Specifying Filenames
      7. 2.3.7  Changing How the Compiler Interprets Filenames
      8. 2.3.8  Changing How the Compiler Processes C Files
      9. 2.3.9  Changing How the Compiler Interprets and Names Extensions
      10. 2.3.10 Specifying Directories
      11. 2.3.11 Assembler Options
      12. 2.3.12 Deprecated Options
    4. 2.4  Controlling the Compiler Through Environment Variables
      1. 2.4.1 Setting Default Compiler Options (C2000_C_OPTION)
      2. 2.4.2 Naming One or More Alternate Directories (C2000_C_DIR)
    5. 2.5  Controlling the Preprocessor
      1. 2.5.1  Predefined Macro Names
      2. 2.5.2  The Search Path for #include Files
        1. 2.5.2.1 Adding a Directory to the #include File Search Path (--include_path Option)
      3. 2.5.3  Support for the #warning and #warn Directives
      4. 2.5.4  Generating a Preprocessed Listing File (--preproc_only Option)
      5. 2.5.5  Continuing Compilation After Preprocessing (--preproc_with_compile Option)
      6. 2.5.6  Generating a Preprocessed Listing File with Comments (--preproc_with_comment Option)
      7. 2.5.7  Generating Preprocessed Listing with Line-Control Details (--preproc_with_line Option)
      8. 2.5.8  Generating Preprocessed Output for a Make Utility (--preproc_dependency Option)
      9. 2.5.9  Generating a List of Files Included with #include (--preproc_includes Option)
      10. 2.5.10 Generating a List of Macros in a File (--preproc_macros Option)
    6. 2.6  Passing Arguments to main()
    7. 2.7  Understanding Diagnostic Messages
      1. 2.7.1 Controlling Diagnostic Messages
      2. 2.7.2 How You Can Use Diagnostic Suppression Options
    8. 2.8  Other Messages
    9. 2.9  Generating Cross-Reference Listing Information (--gen_cross_reference_listing Option)
    10. 2.10 Generating a Raw Listing File (--gen_preprocessor_listing Option)
    11. 2.11 Using Inline Function Expansion
      1. 2.11.1 Inlining Intrinsic Operators
      2. 2.11.2 Inlining Restrictions
      3. 2.11.3 Unguarded Definition-Controlled Inlining
        1. 2.11.3.1 Using the Inline Keyword
      4. 2.11.4 Guarded Inlining and the _INLINE Preprocessor Symbol
        1. 2.11.4.1 Header File string.h
        2. 2.11.4.2 Library Definition File
    12. 2.12 Using Interlist
    13. 2.13 About the Application Binary Interface
    14. 2.14 Enabling Entry Hook and Exit Hook Functions
    15. 2.15 Live Firmware Update (LFU)
  5. Optimizing Your Code
    1. 3.1  Invoking Optimization
    2. 3.2  Controlling Code Size Versus Speed
    3. 3.3  Performing File-Level Optimization (--opt_level=3 option)
      1. 3.3.1 Creating an Optimization Information File (--gen_opt_info Option)
    4. 3.4  Program-Level Optimization (--program_level_compile and --opt_level=3 options)
      1. 3.4.1 Controlling Program-Level Optimization (--call_assumptions Option)
      2. 3.4.2 Optimization Considerations When Mixing C/C++ and Assembly
    5. 3.5  Automatic Inline Expansion (--auto_inline Option)
    6. 3.6  Link-Time Optimization (--opt_level=4 Option)
      1. 3.6.1 Option Handling
      2. 3.6.2 Incompatible Types
    7. 3.7  Using Feedback Directed Optimization
      1. 3.7.1 Feedback Directed Optimization
        1. 3.7.1.1 Phase 1 -- Collect Program Profile Information
        2. 3.7.1.2 Phase 2 -- Use Application Profile Information for Optimization
        3. 3.7.1.3 Generating and Using Profile Information
        4. 3.7.1.4 Example Use of Feedback Directed Optimization
        5. 3.7.1.5 The .ppdata Section
        6. 3.7.1.6 Feedback Directed Optimization and Code Size Tune
        7. 3.7.1.7 Instrumented Program Execution Overhead
        8. 3.7.1.8 Invalid Profile Data
      2. 3.7.2 Profile Data Decoder
      3. 3.7.3 Feedback Directed Optimization API
      4. 3.7.4 Feedback Directed Optimization Summary
    8. 3.8  Using Profile Information to Analyze Code Coverage
      1. 3.8.1 Code Coverage
        1. 3.8.1.1 Phase1 -- Collect Program Profile Information
        2. 3.8.1.2 Phase 2 -- Generate Code Coverage Reports
      2. 3.8.2 Related Features and Capabilities
        1. 3.8.2.1 Path Profiler
        2. 3.8.2.2 Analysis Options
        3. 3.8.2.3 Environment Variables
    9. 3.9  Special Considerations When Using Optimization
      1. 3.9.1 Use Caution With asm Statements in Optimized Code
      2. 3.9.2 Use the Volatile Keyword for Necessary Memory Accesses
        1. 3.9.2.1 Use Caution When Accessing Aliased Variables
        2. 3.9.2.2 Use the --aliased_variables Option to Indicate That the Following Technique Is Used
        3. 3.9.2.3 On FPU Targets Only: Use restrict Keyword to Indicate That Pointers Are Not Aliased
          1. 3.9.2.3.1 Use of the restrict Type Qualifier With Pointers
          2. 3.9.2.3.2 Use of the restrict Type Qualifier With Pointers
    10. 3.10 Using the Interlist Feature With Optimization
    11. 3.11 Data Page (DP) Pointer Load Optimization
    12. 3.12 Debugging and Profiling Optimized Code
      1. 3.12.1 Profiling Optimized Code
    13. 3.13 Increasing Code-Size Optimizations (--opt_for_space Option)
    14. 3.14 Compiler Support for Re-Entrant VCU Code
    15. 3.15 Compiler Support for Generating DMAC Instructions
      1. 3.15.1 Automatic Generation of DMAC Instructions
      2. 3.15.2 Assertions to Specify Data Address Alignment
      3. 3.15.3 __dmac Intrinsic
    16. 3.16 What Kind of Optimization Is Being Performed?
      1. 3.16.1  Cost-Based Register Allocation
      2. 3.16.2  Alias Disambiguation
      3. 3.16.3  Branch Optimizations and Control-Flow Simplification
      4. 3.16.4  Data Flow Optimizations
      5. 3.16.5  Expression Simplification
      6. 3.16.6  Inline Expansion of Functions
      7. 3.16.7  Function Symbol Aliasing
      8. 3.16.8  Induction Variables and Strength Reduction
      9. 3.16.9  Loop-Invariant Code Motion
      10. 3.16.10 Loop Rotation
      11. 3.16.11 Instruction Scheduling
      12. 3.16.12 Register Variables
      13. 3.16.13 Register Tracking/Targeting
      14. 3.16.14 Tail Merging
      15. 3.16.15 Autoincrement Addressing
      16. 3.16.16 Removing Comparisons to Zero
      17. 3.16.17 RPTB Generation (for FPU Targets Only)
  6. Linking C/C++ Code
    1. 4.1 Invoking the Linker Through the Compiler (-z Option)
      1. 4.1.1 Invoking the Linker Separately
      2. 4.1.2 Invoking the Linker as Part of the Compile Step
      3. 4.1.3 Disabling the Linker (--compile_only Compiler Option)
    2. 4.2 Linker Code Optimizations
      1. 4.2.1 Generating Function Subsections (--gen_func_subsections Compiler Option)
      2. 4.2.2 Generating Aggregate Data Subsections (--gen_data_subsections Compiler Option)
    3. 4.3 Controlling the Linking Process
      1. 4.3.1 Including the Run-Time-Support Library
        1. 4.3.1.1 Automatic Run-Time-Support Library Selection
          1. 4.3.1.1.1 Using the --issue_remarks Option
        2. 4.3.1.2 Manual Run-Time-Support Library Selection
        3. 4.3.1.3 Library Order for Searching for Symbols
      2. 4.3.2 Run-Time Initialization
      3. 4.3.3 Initialization by the Interrupt Vector
      4. 4.3.4 Global Object Constructors
      5. 4.3.5 Specifying the Type of Global Variable Initialization
      6. 4.3.6 Specifying Where to Allocate Sections in Memory
      7. 4.3.7 A Sample Linker Command File
    4. 4.4 Linking C28x and C2XLP Code
  7. Post-Link Optimizer
    1. 5.1 The Post-Link Optimizer’s Role in the Software Development Flow
    2. 5.2 Removing Redundant DP Loads
    3. 5.3 Tracking DP Values Across Branches
    4. 5.4 Tracking DP Values Across Function Calls
    5. 5.5 Other Post-Link Optimizations
    6. 5.6 Controlling Post-Link Optimizations
      1. 5.6.1 Excluding Files (-ex Option)
      2. 5.6.2 Controlling Post-Link Optimization Within an Assembly File
      3. 5.6.3 Retaining Post-Link Optimizer Output (--keep_asm Option)
      4. 5.6.4 Disable Optimization Across Function Calls (-nf Option )
      5. 5.6.5 Annotating Assembly with Advice (--plink_advice_only option)
    7. 5.7 Restrictions on Using the Post-Link Optimizer
    8. 5.8 Naming the Outfile (--output_file Option)
  8. C/C++ Language Implementation
    1. 6.1  Characteristics of TMS320C28x C
      1. 6.1.1 Implementation-Defined Behavior
    2. 6.2  Characteristics of TMS320C28x C++
    3. 6.3  Data Types
      1. 6.3.1 Size of Enum Types
      2. 6.3.2 Support for 64-Bit Integers
      3. 6.3.3 C28x double and long double Floating-Point Types
    4. 6.4  File Encodings and Character Sets
    5. 6.5  Keywords
      1. 6.5.1 The const Keyword
      2. 6.5.2 The __cregister Keyword
      3. 6.5.3 The __interrupt Keyword
      4. 6.5.4 The restrict Keyword
      5. 6.5.5 The volatile Keyword
    6. 6.6  C++ Exception Handling
    7. 6.7  Register Variables and Parameters
    8. 6.8  The __asm Statement
    9. 6.9  Pragma Directives
      1. 6.9.1  The CALLS Pragma
      2. 6.9.2  The CLINK Pragma
      3. 6.9.3  The CODE_ALIGN Pragma
      4. 6.9.4  The CODE_SECTION Pragma
      5. 6.9.5  The DATA_ALIGN Pragma
      6. 6.9.6  The DATA_SECTION Pragma
        1. 6.9.6.1 Using the DATA_SECTION Pragma C Source File
        2. 6.9.6.2 Using the DATA_SECTION Pragma C++ Source File
        3. 6.9.6.3 Using the DATA_SECTION Pragma Assembly Source File
      7. 6.9.7  The Diagnostic Message Pragmas
      8. 6.9.8  The FAST_FUNC_CALL Pragma
      9. 6.9.9  The FORCEINLINE Pragma
      10. 6.9.10 The FORCEINLINE_RECURSIVE Pragma
      11. 6.9.11 The FUNC_ALWAYS_INLINE Pragma
      12. 6.9.12 The FUNC_CANNOT_INLINE Pragma
      13. 6.9.13 The FUNC_EXT_CALLED Pragma
      14. 6.9.14 The FUNCTION_OPTIONS Pragma
      15. 6.9.15 The INTERRUPT Pragma
      16. 6.9.16 The LOCATION Pragma
      17. 6.9.17 The MUST_ITERATE Pragma
        1. 6.9.17.1 The MUST_ITERATE Pragma Syntax
        2. 6.9.17.2 Using MUST_ITERATE to Expand Compiler Knowledge of Loops
      18. 6.9.18 The NOINIT and PERSISTENT Pragmas
      19. 6.9.19 The NOINLINE Pragma
      20. 6.9.20 The NO_HOOKS Pragma
      21. 6.9.21 The once Pragma
      22. 6.9.22 The RETAIN Pragma
      23. 6.9.23 The SET_CODE_SECTION and SET_DATA_SECTION Pragmas
      24. 6.9.24 The UNROLL Pragma
      25. 6.9.25 The WEAK Pragma
    10. 6.10 The _Pragma Operator
    11. 6.11 Application Binary Interface
    12. 6.12 Object File Symbol Naming Conventions (Linknames)
    13. 6.13 Initializing Static and Global Variables in COFF ABI Mode
      1. 6.13.1 Initializing Static and Global Variables With the Linker
      2. 6.13.2 Initializing Static and Global Variables With the const Type Qualifier
    14. 6.14 Changing the ANSI/ISO C/C++ Language Mode
      1. 6.14.1 C99 Support (--c99)
      2. 6.14.2 C11 Support (--c11)
      3. 6.14.3 Strict ANSI Mode and Relaxed ANSI Mode (--strict_ansi and --relaxed_ansi)
    15. 6.15 GNU and Clang Language Extensions
      1. 6.15.1 Extensions
      2. 6.15.2 Function Attributes
      3. 6.15.3 For Loop Attributes
      4. 6.15.4 Variable Attributes
      5. 6.15.5 Type Attributes
      6. 6.15.6 Built-In Functions
      7. 6.15.7 Using the Byte Peripheral Type Attribute
    16. 6.16 Compiler Limits
  9. Run-Time Environment
    1. 7.1  Memory Model
      1. 7.1.1 Sections
      2. 7.1.2 C/C++ System Stack
      3. 7.1.3 Allocating .econst to Program Memory
      4. 7.1.4 Dynamic Memory Allocation
      5. 7.1.5 Initialization of Variables
      6. 7.1.6 Allocating Memory for Static and Global Variables
      7. 7.1.7 Field/Structure Alignment
      8. 7.1.8 Character String Constants
    2. 7.2  Register Conventions
      1. 7.2.1 TMS320C28x Register Use and Preservation
      2. 7.2.2 Status Registers
    3. 7.3  Function Structure and Calling Conventions
      1. 7.3.1 How a Function Makes a Call
      2. 7.3.2 How a Called Function Responds
      3. 7.3.3 Special Case for a Called Function (Large Frames)
      4. 7.3.4 Accessing Arguments and Local Variables
      5. 7.3.5 Allocating the Frame and Accessing 32-Bit Values in Memory
    4. 7.4  Accessing Linker Symbols in C and C++
    5. 7.5  Interfacing C and C++ With Assembly Language
      1. 7.5.1 Using Assembly Language Modules With C/C++ Code
      2. 7.5.2 Accessing Assembly Language Functions From C/C++
        1. 7.5.2.1 Calling an Assembly Language Function From a C/C++ Program
        2. 7.5.2.2 Assembly Language Program Called by
        3.       261
      3. 7.5.3 Accessing Assembly Language Variables From C/C++
        1. 7.5.3.1 Accessing Assembly Language Global Variables
          1. 7.5.3.1.1 Assembly Language Variable Program
          2. 7.5.3.1.2 C Program to Access Assembly Language From
        2.       266
        3. 7.5.3.2 Accessing Assembly Language Constants
          1. 7.5.3.2.1 Accessing an Assembly Language Constant From C
          2. 7.5.3.2.2 Assembly Language Program for
          3.        270
      4. 7.5.4 Sharing C/C++ Header Files With Assembly Source
      5. 7.5.5 Using Inline Assembly Language
    6. 7.6  Using Intrinsics to Access Assembly Language Statements
      1. 7.6.1 Floating Point Conversion Intrinsics
      2. 7.6.2 Floating Point Unit (FPU) Intrinsics
      3. 7.6.3 Trigonometric Math Unit (TMU) Intrinsics
      4. 7.6.4 Fast Integer Division Intrinsics
    7. 7.7  Interrupt Handling
      1. 7.7.1 General Points About Interrupts
      2. 7.7.2 Using C/C++ Interrupt Routines
    8. 7.8  Integer Expression Analysis
      1. 7.8.1 Operations Evaluated With Run-Time-Support Calls
      2. 7.8.2 Division Operations with Fast Integer Division Support
      3. 7.8.3 C/C++ Code Access to the Upper 16 Bits of 16-Bit Multiply
    9. 7.9  Floating-Point Expression Analysis
    10. 7.10 System Initialization
      1. 7.10.1 Boot Hook Functions for System Pre-Initialization
      2. 7.10.2 Run-Time Stack
      3. 7.10.3 Automatic Initialization of Variables for COFF
        1. 7.10.3.1 Initialization Tables
        2.       291
        3. 7.10.3.2 Autoinitialization of Variables at Run Time for COFF
        4. 7.10.3.3 Initialization of Variables at Load Time for COFF
        5. 7.10.3.4 Global Constructors
      4. 7.10.4 Automatic Initialization of Variables for EABI
        1. 7.10.4.1 Zero Initializing Variables
        2. 7.10.4.2 Direct Initialization for EABI
        3. 7.10.4.3 Autoinitialization of Variables at Run Time for EABI
        4. 7.10.4.4 Autoinitialization Tables for EABI
          1. 7.10.4.4.1 Length Followed by Data Format
          2. 7.10.4.4.2 Zero Initialization Format
          3. 7.10.4.4.3 Run Length Encoded (RLE) Format
          4. 7.10.4.4.4 Lempel-Ziv-Storer-Szymanski Compression (LZSS) Format
        5. 7.10.4.5 Initialization of Variables at Load Time
        6. 7.10.4.6 Global Constructors
  10. Using Run-Time-Support Functions and Building Libraries
    1. 8.1 C and C++ Run-Time Support Libraries
      1. 8.1.1 Linking Code With the Object Library
      2. 8.1.2 Header Files
      3. 8.1.3 Modifying a Library Function
      4. 8.1.4 Support for String Handling
      5. 8.1.5 Minimal Support for Internationalization
      6. 8.1.6 Support for Time and Clock Functions
      7. 8.1.7 Allowable Number of Open Files
      8. 8.1.8 Library Naming Conventions
    2. 8.2 The C I/O Functions
      1. 8.2.1 High-Level I/O Functions
        1. 8.2.1.1 Formatting and the Format Conversion Buffer
      2. 8.2.2 Overview of Low-Level I/O Implementation
        1.       open
        2.       close
        3.       read
        4.       write
        5.       lseek
        6.       unlink
        7.       rename
      3. 8.2.3 Device-Driver Level I/O Functions
        1.       DEV_open
        2.       DEV_close
        3.       DEV_read
        4.       DEV_write
        5.       DEV_lseek
        6.       DEV_unlink
        7.       DEV_rename
      4. 8.2.4 Adding a User-Defined Device Driver for C I/O
        1. 8.2.4.1 Mapping Default Streams to Device
      5. 8.2.5 The device Prefix
        1.       add_device
        2.       339
        3. 8.2.5.1 Program for C I/O Device
    3. 8.3 Handling Reentrancy (_register_lock() and _register_unlock() Functions)
    4. 8.4 Reinitializing Variables During a Warm Start
    5. 8.5 Library-Build Process
      1. 8.5.1 Required Non-Texas Instruments Software
      2. 8.5.2 Using the Library-Build Process
        1. 8.5.2.1 Automatic Standard Library Rebuilding by the Linker
        2. 8.5.2.2 Invoking mklib Manually
          1. 8.5.2.2.1 Building Standard Libraries
          2. 8.5.2.2.2 Shared or Read-Only Library Directory
          3. 8.5.2.2.3 Building Libraries With Custom Options
          4. 8.5.2.2.4 The mklib Program Option Summary
      3. 8.5.3 Extending mklib
        1. 8.5.3.1 Underlying Mechanism
        2. 8.5.3.2 Libraries From Other Vendors
  11. C++ Name Demangler
    1. 9.1 Invoking the C++ Name Demangler
    2. 9.2 Sample Usage of the C++ Name Demangler
  12. 10CLA Compiler
    1. 10.1 How to Invoke the CLA Compiler
      1. 10.1.1 CLA-Specific Options
    2. 10.2 CLA C Language Implementation
      1. 10.2.1 Variables and Data Types
      2. 10.2.2 Pragmas, Keywords, and Intrinsics
      3. 10.2.3 Optimizations with the CLA Compiler
      4. 10.2.4 C Language Restrictions
      5. 10.2.5 Memory Model - Sections
      6. 10.2.6 Function Structure and Calling Conventions
  13.   A Glossary
    1.     369
  14.   B Revision History
  15.   B Earlier Revisions

Using Intrinsics to Access Assembly Language Statements

The C28x compiler recognizes a number of intrinsic operators. Intrinsics allow you to express the meaning of certain assembly statements that would otherwise be cumbersome or inexpressible in C/C++. Intrinsics are used like functions; you can use C/C++ variables with these intrinsics, just as you would with any normal function.

The intrinsics are specified with a leading double underscore, and are accessed by calling them as you do a function. For example:

long lvar;
int  ivar;
unsigned int uivar;
lvar = __mpyxu(ivar, uivar);

The intrinsics listed in Table 7-6 are available. They correspond to the indicated TMS320C28x assembly language instruction(s). See the TMS320C28x CPU and Instruction Set Reference Guide for more information.

Table 7-6 TMS320C28x C/C++ Compiler Intrinsics
Intrinsic Assembly Instruction(s) Description
int __abs16_sat( int src ); SETC OVM

MOV AH, src

ABS ACC

MOV dst, AH

CLRC OVM

Clear the OVM status bit. Load src into AH. Take absolute value of ACC. Store AH into dst. Clear the OVM status bit.
void __add( int *m, int b ); ADD * m , b Add the contents of memory location m to b and store the result in m, in an atomic way.
long __addcu( long src1, unsigned int src2 ); ADDCU ACC, {mem | reg} The contents of src2 and the value of the carry bit are added to ACC. The result is in ACC.
void __addl( long *m, long b ); ADDL *m, b Add the contents of memory location m to b and store the result in m, in an atomic way.
void __and( int *m, int b ); AND * m, b AND the contents of memory location m to b and store the result in m, in an atomic way.
int &__byte( int *array, unsigned int byte_index); MOVB array [byte_index].LSB, src

or

MOVB dst, array [byte_index ].LSB

The lowest addressable unit in C28x is 16 bits. Therefore, normally you cannot access 8-bit entities off a memory location. This intrinsic helps access an 8-bit quantity off a memory location, and can be invoked as follows:
__byte(array,5) = 10;
 b = __byte(array,20);
When used to read memory, the upper 8 bits of the 16-bit result are always 0.
unsigned long &y __byte_peripheral_32(unsigned long *x); Used to access a 32-bit byte peripheral data address without the access being broken in half. The intrinsic returns a reference to an unsigned long and can be used both to read and write data. See Section 6.15.7.
void __dec( int *m ); DEC * m Decrement the contents of memory location m in an atomic way.
unsigned int __disable_interrupts( ); PUSH ST1
SETC INTM, DBGM
POP reg16
Disable interrupts and return the old value of the interrupt vector.
void __dmac( long *src1, long *src2, long &accum1, long &accum2, int shift); SPMn ; the PM value required for shift
MOVL ACC,accum1
MOVL P, accum2
MOVL XARx, src1
MOVL XAR7, src2
DMAC ACC:P, *XARx++, *XAR7++
Set the required PM value for shift.
Move accum1 and accum2 into ACC and P.
Move the addresses src1 and src2 into XARx and XAR7.
ACC = ACC + (src1[i+1] * src2[i+1]) << PM
P = P + (src1[i] * src2[i]) << PM
See Section 3.15.3 for more information.
void __eallow( void ); EALLOW Permits the CPU to write freely to protected registers.
void __edis( void ); EDIS Prevents the CPU from writing freely to protected registers after EALLOW is used.
unsigned int __enable_interrupts( ); PUSH ST1
CLRC INTM, DBGM
POP reg16
Enable interrupts and return the old value of the interrupt vector.
uint32_t __f32_bits_as_u32( float src ); -- Extracts the bits in a float as a 32-bit register. This intrinsic generates no code; it tells the compiler to change how it interprets the bits in place. See Section 7.6.1 for examples.
uint64_t __f64_bits_as_u64( double src ); -- Extracts the bits in a double as a 64-bit register. This intrinsic generates no code; it tells the compiler to change how it interprets the bits in place. See Section 7.6.1 for examples.
int __flip16(int src); FLIP AX Reverses order of bits in int src.
long __flip32(long src); FLIP AX Reverses order of bits in long src.
long long __flip64(long long src); FLIP AX Reverses order of bits in long long src.
void __inc( int *m ); INC *m Increment the contents of memory location m in an atomic way.
long=__IQ( long double A , int N ); Convert the long double A into the correct IQN value returned as a long type. If both arguments are constants the compiler converts the arguments to the IQ value during compile time. Otherwise a call to the RTS routine, __IQ, is made. This intrinsic cannot be used to initialize global variables to the .cinit section.
long dst =__IQmpy( long A, long B , int N ); Perform optimized multiplication using the C28 IQmath library. The dst becomes ACC or P, A becomes XT:
If   N == 0: IMPYL {ACC|P}, XT, B The dst is ACC or P. If dst is ACC, the instruction takes 2 cycles. If dst is P, the instruction takes 1 cycle.
If    0 < N < 16: IMPYL P, XT, B
QMPYL ACC, XT, B
ASR64 ACC:P, # N
If    15 < N < 32: IMPYL P, XT, B
QMPYL ACC, XT, B
LSL64 ACC:P, #(32- N )
If    N == 32: QMPYL {ACC|P}, XT, B
If    N is a variable: IMPYL P, XT, B
QMPYL ACC, XT, B
MOV T, N
LSR64 ACC:P, T
long dst= __IQsat( long A, long max, long min ); The dst becomes ACC. Different code is generated based on the value of max and/or min. Calling __IQsat with max < min results in undefined behavior.
If    max and min are 22-bit unsigned constants: MOVL ACC, A
MOVL XAR n, # 22bits
MINL ACC, XAR n
MOVL XAR n, # 22bits
MAXL ACC, XAR n
If    max and min are other constants: MOVL ACC, A
MOV PL, # max lower 16 bits
MOV PH, # max upper 16 bits
MINL ACC, P
MOV PL, # min lower 16 bits
MOV PH, # min upper 16 bits
MAXL ACC, P
If    max and/or min are variables: MOVL ACC, A
MINL ACC, max
MAXL ACC, min
long dst= __IQxmpy(long A, long B, int N); Perform optimized multiplication by a power of 2 using the C28 IQmath library. The dst becomes ACC or P; A becomes XT. Code is generated based on the value of N.
If    N == 0: IMPYL ACC/P, XT, B The dst is in ACC or P.
If    0 < N < 17: IMPYL P, XT, B
QMPYL ACC, XT, B
LSL64 ACC:P, # N
The dst is in ACC.
If    0 > N > -17: QMPYL ACC, XT, B
SETC SXM
SFR ACC, #abs(N)
The dst is in ACC.
If    16 < N < 32: IMPYL P, XT, B
QMPYL ACC, XT, B
ASR64 ACC:P, # N
The dst is in P.
If    N == 32: IMPYL P, XT, B The dst is in P.
If    -16 > N > -33 QMPYL ACC, XT, B
SETC SXM SRF ACC, #16
SRF ACC, #abs(N)−16
The dst is in ACC.
If    32 < N < 49: IMPYL ACC, XT, B
LSL ACC, # N -32
The dst is in ACC.
If    -32 > N > -49: QMPYL ACC, XT, B
SETC SXM SFR ACC, #16
SFR ACC, #16
The dst is in ACC.
If    48 < N < 65: IMPYL ACC, XT, B
LSL64 ACC:P, #16
LSL64 ACC:P, # N −48
The dst is in ACC.
If    -48 > N > -65: QMPYL ACC, XT, B
SETC SXM SFR ACC, #16
SFR ACC, #16
The dst is in ACC.
long long __llmax(long long dst, long long src); MAXL ACC,src.hi32
MAXCUL P, src.lo32
If src > dst, copy src to dst.
long long __llmin(long long dst, long long src); MINL ACC,src.hi32
MINCUL P, src.lo32
If src < dst, copy src to dst
long __lmax(long dst, long src); MAXL ACC,src If src > dst, copy src to dst.
long __lmin(long dst, long src); MINL ACC,src If src < dst, copy src to dst
int __max(int dst, int src); MAXdst, src If src > dst, copy src to dst
int __min(int dst, int src); MINdst, src If src < dst, copy src to dst
int __mov_byte( int *src, unsigned int n ); MOVB AX.LSB,*+XARx[ n ]

or

MOVZ AR0/AR1, @ n

MOVB AX.LSB,*XARx[ {AR0|AR1} ]

Return the 8-bit nth element of a byte table pointed to by src.

This intrinsic is provided for backward compatibility. The intrinsic __byte is preferred as it returns a reference. Nothing can be done with __mov_byte() that cannot be done with __byte().

long __mpy( int src1, int src2 ); MPY ACC,src1 , #src2 Move src1 to the T register. Multiply T by a 16-bit immediate (src2). The result is in ACC.
long __mpyb( int src1, uint src2 ); MPYB {ACC | P}, T, # src2 Multiply src1 (the T register) by an unsigned 8-bit immediate (src2). The result is in ACC or P.
long __mpy_mov_t( int src1, int src2, int * dst2); MPY ACC, T,src2
MOV @ dst2, T
Multiply src1 (the T register) by src2. The result is in ACC. Move src1 to *dst2.
unsigned long __mpyu(unit src2, unit srt2); MPYU {ACC | P}, T,src2 Multiply src1 (the T register) by src2. Both operands are treated as unsigned 16-bit numbers. The result is in ACC or P.
long __mpyxu( int src1, uint src2 ); MPYXU ACC, T, {mem|reg} The T register is loaded with src1. The src2 is referenced by memory or loaded into a register. The result is in ACC.
long dst= __norm32(long src, int * shift ); CSB ACC
LSLL ACC, T
MOV @ shift, T
Normalize src into dst and update *shift with the number of bits shifted.
long long dst= __norm64(long long src,
int * shift);
CSB ACC
LSL64 ACC:P, T
MOV @ shift, T
CSB ACC
LSL64 ACC:P, T
MOV TMP16, AH
MOV AH, T
ADD shift, AH
MOV AH, TMP16
Normalize 64-bit src into dst and update *shift with the number of bits shifted.
void __or( int * m , int b ); OR * m , b OR the contents of memory location m to b and store the result in m, in an atomic way.
long __qmpy32( long src32a, long src32b, int q ); CLRC OVM SPM − 1
MOV T, src32a + 1
MPYXU P, T, src32b + 0
MOVP T, src32b + 1
MPYXU P, T, src32a + 0
MPYA P, T, src32a + 1
Extended precision DSP Q math. Different code is generated based on the value of q.
If   q = 31,30: SPM q − 30
SFR ACC, #45 − q
ADDL ACC, P
If   q = 29: SFR ACC, #16
ADDL ACC, P
If   q = 28 through 24: SPM q - 30
SFR ACC, #16
SFR ACC, #29 - q
ADDL ACC, P
If   q = 23 through 13: SFR ACC, #16
ADDL ACC, P
SFR ACC, #29 − q
If   q = 12 through 0: SFR ACC, #16
ADDL ACC, P
SFR ACC, #16
SFR ACC, #13 − q
long __qmpy32by16(long src32, int src16, int q); CLRC OVM
MOV T, src16 + 0
MPYXU P, T, src32 + 0
MPY P, T, src32 + 1
Extended precision DSP Q math. Different code is generated based on the value of q.
If    q = 31, 30: SPM q − 30
SFR ACC, #46 − q
ADDL ACC, P
If    q = 29 through 14: SPM 0
SFR ACC, #16
ADDL ACC, P
SFR ACC, #30 − q
If    q = 13 through 0: SPM 0
SFR ACC, #16
ADDL ACC, P
SFR ACC, #16
SFR ACC, #14 − q
void __restore_interrupts(unsigned int val); PUSH val
POP ST1
Restore interrupts and set the interrupt vector to value val.
long __rol( long src ); ROL ACC Rotate ACC left.
long __ror( long src ); ROR ACC Rotate ACC right.
void *result = __rpt_mov_imm(void * dst , int src ,
int count );
MOV result , dst
MOV ARx, dst
RPT # count
|| MOV *XARx++, # src
Move the dst register to the result register. Move the dst register to a temp (ARx) register. Copy the immediate src to the temp register count + 1 times.

The src must be a 16-bit immediate. The count can be an immediate from 0 to 255 or a variable.

int __rpt_norm_inc( long src, int dst, int count ); MOV ARx, dst
RPT # count
|| NORM ACC, ARx++
Repeat the normalize accumulator value count + 1 times.

The count can be an immediate from 0 to 255 or a variable.

int __rpt_norm_dec(long src, int dst, int count); MOV ARx, dst
RPT # count
|| NORM ACC, ARx--
Repeat the normalize accumulator value count + 1 times.

The count can be an immediate from 0 to 255 or a variable.

long __rpt_rol(long src, int count); RPT # count
|| ROL ACC
Repeat the rotate accumulator left count + 1 times. The result is in ACC.

The count can be an immediate from 0 to 255 or a variable.

long __rpt_ror(long src, int count); RPT # count
|| ROR ACC
Repeat the rotate accumulator right count + 1 times. The result is in ACC.

The count can be an immediate from 0 to 255 or a variable.

long __rpt_subcu(long dst, int src, int count); RPT count
|| SUBCU ACC, src
The src operand is referenced from memory or loaded into a register and used as an operand to the SUBCU instruction. The result is in ACC.

The count can be an immediate from 0 to 255 or a variable. The instruction repeats count + 1 times.

unsigned long __rpt_subcul(unsigned long num, unsigned long den, unsigned long &remainder, int count); RPT count
|| SUBCUL ACC, den
Performs repeated conditional long subtraction as typically used in unsigned modulus division. Returns the quotient.
long __sat( long src ); SAT ACC Load ACC with 32-bit src. The result is in ACC.
long __sat32( long src, long limit ); SETC OVM
ADDL ACC, {mem|P}
SUBL ACC, {mem|P}
SUBL ACC, {mem|P}
ADDL ACC, {mem|P}
CLRC OVM
Saturate a 32-bit value to a 32-bit mask. Load ACC with src. Limit value is either referenced from memory or loaded into the P register. The result is in ACC.
long __sathigh16(long src, int limit); SETC OVM
ADDL ACC, {mem|P}<<16
SUBL ACC, {mem|P}<<16
SUBL ACC, {mem|P}<<16
ADDL ACC, {mem|P}<<16
CLRC OVM
SFR ACC, rshift
Saturate a 32-bit value to 16-bits high. Load ACC with src. The limit value is either referenced from memory or loaded into register. The result is in ACC. The result can be right shifted and stored into an int. For example:
ivar=__sathigh16(lvar, mask)>>6;
long __satlow16( long src ); SETC OVM
MOV T, #0xFFFF
CLR SXM ; if necessary
ADD ACC, T <<15
SUB ACC, T <<15
SUB ACC, T <<15
ADD ACC, T <<15
CLRC OVM
Saturate a 32-bit value to 16-bits low. Load ACC with src. Load T register with #0xFFFF. The result is in ACC.
long __sbbu( long src1 , uint src2 ); SBBU ACC, src2 Subtract src2 + logical inverse of C from ACC (src1). The result is in ACC.
void __sub( int * m, int b ); SUB * m , b Subtract b from the contents of memory location m and store the result in m, in an atomic way.
long __subcu( long src1, int src2 ); SUBCU ACC, src2 Subtract src2 shifted left 15 from ACC (src1). The result is in ACC.
unsigned long __subcul(unsigned long num, unsigned long den, unsigned long &remainder); SUBCUL ACC, den Performs a single conditional long subtraction as typically used in unsigned modulus division. Returns the quotient.
void __subl( long * m, long b ); SUBL *m , b Subtract b from the contents of memory location m and store the result in m, in an atomic way.
void __subr( int * m , int b ); SUBR *m , b Subtract the contents of memory location m from b and store the result in m, in an atomic way.
void __subrl( long * m , long b ); SUBRL *m , b Subtract the contents of memory location m from b and store the result in m, in an atomic way.
if (__tbit( int src , int bit ) ); TBIT src , # bit SET TC status bit if specified bit of src is 1.
float __u32_bits_as_f32( uint32_t src ); -- Packs a 32-bit register as a float. This intrinsic generates no code; it tells the compiler to change how it interprets the bits in place. See Section 7.6.1 for examples.
double __u64_bits_as_f64( uint64_t src ); -- Packs a 64-bit register as a double. This intrinsic generates no code; it tells the compiler to change how it interprets the bits in place. See Section 7.6.1 for examples.
void __xor( int * m, int b ); XOR * m, b XOR the contents of memory location m to b and store the result in m, in an atomic way.