SPRUIF3B May 2017 – March 2019 DRA790 , DRA791 , DRA793 , DRA797
Figure 12 is part of the SoC pinmux table for GPMC. The SoC device supports additional functions not shown in the table. The functions shown are intended to reflect those supported on the EVM. These functions include:
MUX C: Selects between NOR memory and EMMC memory. The selection is made using the I/O expander 3, bits P15 and P14. If booting from EMMC, the DIP Switch SW8 position 3 is used to select interface (by default). Figure 13 shows the MUX diagram for GPMC and EMMC.