SPRUIY3 February   2023 TMS320F2800133 , TMS320F2800135 , TMS320F2800137 , TMS320F2800152-Q1 , TMS320F2800153-Q1 , TMS320F2800154-Q1 , TMS320F2800155 , TMS320F2800155-Q1 , TMS320F2800156-Q1 , TMS320F2800157 , TMS320F2800157-Q1 , TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Feature Differences Between F28002x, F280015x and F280013x
    1. 1.1 F28002x, F280015x and F280013x Feature Comparison
      1. 1.1.1 F28002x, F280013x and F280015x Superset Device Comparison
  4. 2PCB Hardware Changes
    1. 2.1 PCB Hardware Changes for the 80-Pin PN, 64-Pin PM and 48-Pin PT or PHP Packages
    2. 2.2 New and Existing PCB Migration
  5. 3Feature Differences for System Consideration
    1. 3.1 New Features in F280013x and F280015x
      1. 3.1.1 Secure Boot/JTAG Lock
      2. 3.1.2 Embedded Pattern Generator (EPG)
      3. 3.1.3 Lockstep Compare Module (LCM)
      4. 3.1.4 INTOSC External Precision Resistor (ExtR)
    2. 3.2 Communication Module Changes
    3. 3.3 Control Module Changes
    4. 3.4 Analog Module Differences
      1. 3.4.1 CMPSS Module Variants
    5. 3.5 Other Device Changes
      1. 3.5.1 PIE Channel Mapping
      2. 3.5.2 Bootrom
      3. 3.5.3 CLB and Motor Control Libraries
      4. 3.5.4 AGPIO
        1. 3.5.4.1 AGPIO Filter
        2. 3.5.4.2 Digital Inputs and Outputs on ADC Pins (AGPIOs)
    6. 3.6 Power Management
      1. 3.6.1 LDO/VREG
      2. 3.6.2 POR/BOR
      3. 3.6.3 Power Consumption
    7. 3.7 Memory Module Changes
    8. 3.8 GPIO Multiplexing Changes
    9. 3.9 Analog Multiplexing Changes
  6. 4Application Code Migration From F28002x to F280015x or F280013x
    1. 4.1 C2000Ware Header Files
    2. 4.2 Linker Command Files
    3. 4.3 C2000Ware Examples
  7. 5Specific Use Cases Related to F280015x and F280013x New Features
    1. 5.1 EPG
  8. 6EABI Support
    1. 6.1 Flash API
  9. 7References

3.5.1 PIE Channel Mapping

Pie channel mapping between F28002x and F280015x or F280013x is different due to peripheral module changes between these devices. Table 3-6 summarizes the common and unique pie channel assignments on these three devices.

Table 3-5 PIE Channel Legend
Color Description
PIE channel applicable for all three devices
PIE channel applicable for F280013x and F280015x only
PIE channel applicable for F280015x only
PIE channel applicable for F280015x and F28002x only
PIE channel applicable for F28002x only
Table 3-6 PIE Channel Mapping Comparison
INTx.1 INTx.2 INTx.3 INTx.4 INTx.5 INTx.6 INTx.7 INTx.8 INTx.9 INTx.10 INTx.11 INTx.12 INTx.13 INTx.14 INTx.15 INTx.16
INT1.y ADCA1 ADCC1 ADCC1 XINT1 XINT2 SYS_
ERR		 TIMER0 WAKE /WDOG - - - - - - - -
INT2.y EPWM1_ TZ EPWM2_ TZ EPWM3_ TZ EPWM4_ TZ EPWM5_ TZ EPWM6_ TZ EPWM7_ TZ - - - - - - - - -
INT3.y EPWM1 EPWM2 EPWM3 EPWM4 EPWM5 EPWM6 EPWM7 - - - - - - - - -
INT4.y ECAP1 ECAP2 ECAP3 - - - - - - - ECAP3
INT2		 - - - - -
INT5.y EQEP1 EQEP2 - - CLB1 CLB2 - - - - - - - - - -
INT6.y SPIA_RX SPIA_TX SPIB_RX SPIB_TX LINA_0 LINA_1 DCC0 - - - - - - - - -
INT7.y DMA_ CH1 DMA_ CH2 DMA_ CH3 DMA_ CH4 DMA_ CH5 DMA_ CH6 PMBUSA - - - FSITX_ INT1 FSITX_ INT2 FSIRX_ INT1 FSIRX_ INT2 - DCC0
INT8.y I2CA I2CA_ FIFO I2CB I2CB_ FIFO SCIC_RX SCIC_TX - - LINA_0 LINA_1 LINB_0 LINB_1 PMBUSA - - DCC1
INT9.y SCIA_RX SCIA_TX SCIB_RX SCIB_TX CANA_0 CANA_1 MCANSS0 MCANSS1 - - - - BGCRC - - HICA
INT10.y ADCA_ EVT ADCA2 ADCA3 ADCA4 ADCC_ EVT ADCC2 ADCC3 ADCC4 ADCC_ EVT ADCC2 ADCC3 ADCC4 - - - -
INT11.y - - - - - - - - - - - - - - - -
INT12.y XINT3 XINT4 XINT5 MPOST FMC/FLSS_
INT		 VCRC MCANSS
_WAKE_
AND_TS
_PLS 		MCANSS
_ECC_
CORR_
PLS 		- RAM_
CORRECTABLE_
ERROR		 FLASH_
CORRECTABLE_
ERROR		 RAM_
ACCESS_
VIOLATION		 - - - -
FPU_OVER FLOW FPU_ UNDER FLOW