Increasing power-supply reliability is all about reducing thermal, voltage and current stress on power components, which are mostly a function of the input voltage and power required. Still, you have the option to select topologies that can help reduce these stresses.

Similarly, while thermal stress is a function of power rating, power-supply efficiency plays a significant role, too. So in the pursuit of reliability, it is important to explore topologies and circuit components that provide high efficiency.

In our 94.5% Efficiency, 500-W industrial AC/DC reference design, the front-end power factor correction (PFC) stage is an interleaved transition-mode boost topology, although a single-stage continuous conduction mode (CCM) boost topology is also a feasible option. The topology choice was mostly due to device stress considerations; the interleaved topology reduces current stress in the power components (a boost inductor, switching metal-oxide semiconductor field effect transistor [MOSFET] and rectifier diode) by a factor of two, as the two stages operate in parallel. Figure 1 shows simplified diagrams of the two topologies.

Transition-mode PFC has the upper hand in reducing switching stress since there is a significant reduction in turn-on stress. At input voltages lower than half the output voltage, you get zero voltage switching in transition mode; even with higher input voltages, there is a significant reduction in the level of voltage switched. There is also zero current switching (ZCS) of both the MOSFET and rectifier in all conditions. ZCS operation results in a near elimination of reverse recovery in the rectifier diode, which also contributes to reduced stress and reduced electromagnetic interference (EMI). While reduced EMI cannot give a direct reliability advantage, the reduced number of EMI filter components and the reduced possibility of noise pickup at sensitive circuit sections can indirectly contribute toward improved reliability of the overall power supply.

When considering thermal stress, the interleaved transition-mode boost topology again is more advantageous than the CCM topology. In the interleaved transition-mode topology, the components operate at lower temperatures; more components share almost the same amount of power loss compared to the CCM topology. Operating at reduced temperatures has a considerable effect on power-supply reliability, especially in systems that do not have a provision for forced airflow.

In addition, the interleaved operation greatly reduces ripple currents in both the input and output capacitors. This is an important consideration, especially for the aluminum electrolytic-type output capacitor, which is one of the weakest links in determining overall power-supply reliability. The ripple current is the single most important factor that determines the output capacitor’s life (the voltage rating being constrained to 450 V/500 V due to size, cost and availability reasons) in PFC applications. A reduction in ripple current should be seen not only as a derating against the specifications but more significantly as a reduction in temperature due to reduced power dissipation.

For the DC/DC stage, the inductor-inductor-capacitor (LLC) topology is the preferred choice due to the reduced switching stress, although it does have an associated increase in current stress. Operating at full load slightly above the resonant frequency minimizes the increase in current stress while avoiding the output synchronous MOSFET body-diode reverse recovery due to ZCS turnoff.

The design achieves close to 95% efficiency without adding much complexity. The PFC stage efficiency is above 98% at 230 V and above 96.5% at 115 V. The LLC stage offers efficiency above 96.5%. The topology and component selection are contributing factors to this performance.

Another important point to consider is the efficiency of the circuit over its operating range: it may not always be operating at full load or near full load during its lifetime. So it is important to achieve good efficiency over a wide operating area. This is where the choice of controllers for PFC and LLC power stages becomes critical. Both of the controllers used in this design (the UCC28064A for PFC and the UCC256301 for LLC) have control techniques that offer efficiency advantages over a wide operating range, as shown in Figure 2. Additionally, the UCC24612, the synchronous rectifier controller and driver used in this design, reduces the output rectifier loss and, indirectly, the primary side losses by implementing a near-ideal diode emulation. The contribution of these controller devices to improving overall reliability is not insignificant.

In industrial power applications, you must select topologies that can reduce component stress. The interleaved transition-mode boost topology and the LLC topology are better choices than other topologies because of the component stress reduction you get. Topology selection should consider distributing power losses to more components, and improving efficiency is important because thermal stress is directly related to it.

Additional Resources

Watch our video on “Maximizing efficiency of your LLC power stage.”