TIDT357 November   2023

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5. 1Power Requirements
    1.     6
    2.     7
    3. 1.1 Power-On Sequence
    4. 1.2 Power-Off Sequence
    5. 1.3 Required Equipment
    6. 1.4 Dimensions
  6. 2Testing and Results
    1. 2.1 Efficiency Graphs
    2. 2.2 Efficiency Data
    3. 2.3 Thermal Images
  7. 3Waveforms
    1. 3.1 Start-Up Sequence
    2. 3.2 Shutdown Sequence
    3. 3.3 Output Voltage Ripple
    4. 3.4 Load Transients

1 Power Requirements

The AM62x-Q1 family of devices require four to eight power supply groups, depending on the system requirements. The power supply groups include the core supply (VDD_CORE), RAM supply (VDDR_CORE), DDR PHY IO supply (VDDS_DDR), 3.3-V digital supply (VDDSHVx), SD card interface supply (VDDSHV5), 1.8-V digital supply (VDDSHVy), 1.8-V analog supply (VDDA_1P8), and a 1.8-V eFuse programming supply (VPP).

Figure 1-1 shows a block diagram of the AM62x-Q1 power tree. The different voltage regulators for these rails were chosen based on cost, good efficiency, load transient performance, and power up or power down sequencing requirements. This reference design does not support any low-power modes for the AM62x-Q1.

The LM61480-Q1 buck converter is used to supply the 3.3 V, VDDSHVx, the 3.3-V VDDSHV5 rail, as well as act as the input supply for the rest of the voltage regulators. A couple of logic gates along with an RC delay are also required for proper sequencing of the VDD_CORE and VDDR_CORE rails. A logic gate and a programmable delay supervisor, TPS3808E-Q1 is also required for proper sequencing of MCU_PORz.