SBOA222A February   2018  – January 2019 LMV771 , LMV981-N

 

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  3.   Revision History

Design Goals

InputOutputSupply
ViMinViMaxVoMinVoMaxVccVeeVref
–240 mV240 mV0.1 V4.9 V5 V0 V5 V

Design Description

This circuit amplifies an AC signal and shifts the output signal so that it is centered at half the power supply voltage. Note that the input signal has zero DC offset so it swings above and below ground. The key benefit of this circuit is that it accepts signals which swing below ground even though the amplifier does not have a negative power supply.

GUID-28D11958-2058-4A0A-819B-36E6AADDEA70-low.gif

Design Notes

  1. R1 sets the AC input impedance. R4 loads the op amp output.
  2. Use low feedback resistances to reduce noise and minimize stability concerns.
  3. Set the output range based on linear output swing (see Aol specification).
  4. The cutoff frequency of the circuit is dependent on the gain bandwidth product (GBP) of the amplifier. Additional filtering can be accomplished by adding a capacitor in parallel to R4. Adding a capacitor in parallel with R4 will also improve stability of the circuit if high-value resistors are used.

Design Steps

  1. Select R1 and R4 to set the AC voltage gain.
    R 1 = 1    (Standard Value)
    R 4 = R 1 × G ac = 1   × - 10 V V = 10  (Standard Value)
  2. Select R2 and R3 to set the DC output voltage to 2.5 V.
    R 3 = 4 . 99  (Standard Value)
    R 2 = R 3 × V ref V DC - R 3 = 4 . 99 × 5 V 2 . 5 V - 4 . 99 = 4 . 99
  3. Choose a value for the lower cutoff frequency, fl, then calculate C1.
    f l = 16 Hz
    C 1 = 1 2 × π × R 1 × f l = 1 2 × π × 1   × 16 Hz = 9 . 94 μF 10 μF  (Standard Value)
  4. Choose a value for fdiv, then calculate C2.
    f div = 6 . 4 Hz
    R div = R 2 × R 3 R 2 + R 3 = 4 . 99 × 4 . 99 4 . 99 + 4 . 99 = 2 . 495
    C 2 = 1 2 × π × R div × f div = 1 2 × π × 2 . 495 × 6 . 4 Hz = 9 . 96 μF 10 μF  (Standard Value)
  5. The upper cutoff frequency, fh, is set by the noise gain of this circuit and the gain bandwidth (GBW) of the device (LMV981).
    GBW = 1 . 5 MHz
Gnoise=1+R4R1 =1+101  =11VV
fh =GBWGnoise =1.5MHz11VV =136.3kHz

Design Simulations

AC Simulation Results

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Transient Simulation Results

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Design References

See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.

See circuit SPICE simulation file SBOC504.

See TIPD185.

Design Featured Op Amp

LMV981
Vcc 1.8 V to 5 V
VinCM Rail-to-rail
Vout Rail-to-rail
Vos 1 mV
Iq 116 µA
Ib 14 nA
UGBW1.5 MHz
SR0.42 V/µs
#Channels1 and 2
LMV981

Design Alternate Op Amp

LMV771
Vcc 2.7 V to 5 V
VinCM Vee to (Vcc–0.9 V)
Vout Rail-to-rail
Vos 0.25 mV
Iq 600 µA
Ib –0.23 pA
UGBW3.5 MHz
SR1.5 V/µs
#Channels1 and 2
LMV771