SBOSA08 February   2021 INA183

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Single-Supply Operation from IN+
      2. 8.3.2 Low Gain Error and Offset Voltage
      3. 8.3.3 Low Drift Architecture
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation
      2. 8.4.2 Unidirectional, High-Side Operation
      3. 8.4.3 Input Differential Overload
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 RSENSE and Device Gain Selection
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Typical Characteristics

TA = 25 °C, VS = VIN+ = 12 V (unless otherwise noted)

GUID-20210125-CA0I-VXVK-LHMZ-C0HKCSHKXJMP-low.svgFigure 7-1 Input Offset Voltage Production Distribution
GUID-20210129-CA0I-TGPP-KZWB-HNQCBQJBMB3T-low.svgFigure 7-3 Common-Mode Rejection Production Distribution (A1 Devices)
GUID-20210114-CA0I-6DG6-9WCQ-F62626HTK4T1-low.svgFigure 7-5 Common-Mode Rejection Production Distribution (A3 Devices)
GUID-20210125-CA0I-314R-9PM8-BBRQBLHW4GCR-low.svgFigure 7-7 Gain Error Production Distribution (A1 Devices)
GUID-20210125-CA0I-VDWV-JWF7-R0M90FNDSZSN-low.svgFigure 7-9 Gain Error Production Distribution (A3 Devices)
GUID-20210129-CA0I-VDQ3-RXCS-LS7KCT7KXTK6-low.gifFigure 7-11 Gain vs. Frequency
GUID-B4007C8F-6486-4E21-8782-F215CADA4AC3-low.gifFigure 7-13 Output Voltage Swing vs. Output Current
GUID-87A9D691-FAED-42B5-9ED4-4D7908B05D1F-low.gifFigure 7-15 Input Bias Current vs. Temperature
GUID-20210129-CA0I-SVXV-W4DC-Q6RWG9VSQGF1-low.gifFigure 7-17 Input-Referred Voltage Noise vs. Frequency
GUID-5CD13D8E-FFA6-47D8-9E09-DCD271501A3F-low.gifFigure 7-19 Step Response (10-mVPP Input Step)
GUID-20210114-CA0I-3DG1-H9LN-XNPTM8VMQHQ8-low.svgFigure 7-21 Inverting Differential Input Overload
GUID-20210129-CA0I-TWL1-VL8J-J18L9BLWCSBC-low.svgFigure 7-23 Brownout Recovery
GUID-20210129-CA0I-DCVS-8JPS-B9LHDJ4KHJ3K-low.svgFigure 7-2 Offset Voltage vs. Temperature
GUID-20210114-CA0I-CCGL-GBNJ-1H8F8ZS91BF3-low.svgFigure 7-4 Common-Mode Rejection Production Distribution (A2 Devices)
GUID-D78AC983-4776-41BC-BFFA-EDC7771633F8-low.gifFigure 7-6 Common-Mode Rejection Ratio vs. Temperature
GUID-20210125-CA0I-2NHB-VZTM-GTV3BSLSDSXD-low.svgFigure 7-8 Gain Error Production Distribution (A2 Devices)
GUID-8FE2B942-A9D9-469E-82E0-E0578CF127E7-low.gifFigure 7-10 Gain Error vs. Temperature
GUID-20210129-CA0I-S43G-ZZX8-28R8TP964NDH-low.gifFigure 7-12 Common-Mode Rejection Ratio vs. Frequency
GUID-20210114-CA0I-VHSL-XMDK-6JL7PLRTTVWK-low.svgFigure 7-14 Input Bias Current vs. Common-Mode Voltage
GUID-20210125-CA0I-6JZP-8V0X-0MQQFFT0TQDX-low.svgFigure 7-16 Quiescent Current vs. Temperature
GUID-20210129-CA0I-SG8L-T5TP-9FG73SBRG1PP-low.gifFigure 7-18 0.1-Hz to 10-Hz Voltage Noise (Referred-to-Input)
GUID-20210129-CA0I-F9XG-DK1Q-NX1WRGCVF01D-low.gifFigure 7-20 Common-Mode Voltage Transient Response
GUID-20210129-CA0I-GZV8-GLKQ-DZNTGGQRJSM8-low.svg
VDIFF = 0 V VCM = 12-V Pulse
Figure 7-22 Start-Up Response