SBOU315 March   2024 PGA849

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 EVM Circuit Description
    2. 2.2 Jumper Settings
    3. 2.3 Power-Supply Connections
    4. 2.4 Analog Input and Output Connections
    5. 2.5 Reference Input
    6. 2.6 Digital Input Pins and Gain Control
    7. 2.7 Modifications
    8. 2.8 Best Practices
      1. 2.8.1 Electrostatic Discharge Caution
      2. 2.8.2 Hot Surface Warning
  8. 3Hardware Design Files
    1. 3.1 Schematic
    2. 3.2 PCB Layout
    3. 3.3 Bill of Materials
  9. 4Additional Information
    1. 4.1 Trademarks
  10. 5Related Documentation

2.5 Reference Input

The output voltage of the PGA849 is developed with respect to the voltage on reference pin REF. Use the REF pin to offset the output signal to a precise voltage level. Typically, this offset is set to the mid-voltage level of the output-stage supplies. To accomplish this level shift, a voltage source must be connected to the REF pin to level-shift the output so that the PGA849 drives a single-supply ADC. For bipolar voltage output-stage supply operation, the REF pin is typically connected to the low-impedance system ground.

The voltage source applied to the reference pin must provide a low output impedance. Any resistance at the reference pin is in series with an internal 5kΩ resistor that creates an imbalance in the four resistors of the internal difference amplifier. The PGA849EVM provides an optional reference buffer through the OPA192 op-amp (U2). This buffer provides a low-impedance path when driving the REF pin with external reference sources.

Connector J2.1 of the EVM provides access for external reference sources. For best performance, use a low-noise, low-drift, precision reference when driving the REF pin with an external source. To connect the buffer to the external reference source, insert wires into each terminal of J2 and then tighten the screws to make the connection.

To set the REF to the external reference, shunt jumper J1 4-3. In similar fashion, shunt jumper J1 1-2 to set REF to GND. Alternatively, shunt jumper J1 5-6 to set the REF to mid-supply level of the output-stage supplies through the R1-R2 voltage divider.

To bypass the buffer and access the REF pin directly, shunt jumper J17 2-3.

By default, the buffer drives the REF pin, and the reference is set to mid-supply level of the output stage supplies. Jumper J17 is set to shunt pins 1-2, and Jumper J1 is set to shunt pins 5-6. Figure 3-5 shows the REF input connections and optional REF buffer.

GUID-20240314-SS0I-5XPQ-SMTK-BFLGGC0XVT2W-low.svgFigure 2-5 PGA849EVM Reference Input and Optional Buffer
Note: When using the optional REF buffer, the REF input signal must allow headroom above and below the op-amp supplies. Use a reference input voltage in the range of (LVSS-) + 300mV < REF_ext < (LVDD+) -300mV to remain within a good OPA192 output swing linear range. Exceeding the op-amp linear range results in degraded linearity performance of the PGA849 circuit.