SCLA025B December   2019  – March 2021 SN74LVC1G08

 

  1. 1Trademarks
  2. 2Block Diagram
  3. 3Optimizing Communication with Wireless Interfaces
    1. 3.1 SDIO Voltage Translation
    2. 3.2 UART Voltage Translation
  4. 4Logic and Translation Use Cases
    1. 4.1 Logic Use Cases
      1. 4.1.1 Drive Indicator LEDs
      2. 4.1.2 Power Sequencing: Combine Power Good Signals
      3. 4.1.3 Debounce Switches and Buttons
      4. 4.1.4 Tamper Detection: Latching Alarm Circuit with Reset
    2. 4.2 Voltage Translation Use Cases
      1. 4.2.1 SPI Communication
      2. 4.2.2 SD Card Communication
  5. 5Recommended Logic and Translation Families for HVAC Gateways
    1. 5.1 AUP: Advanced Ultra-Low-Power CMOS Logic and Translation
    2. 5.2 AXC: Advanced eXtremely Low-Voltage CMOS Translation
    3. 5.3 LVC: Low-Voltage CMOS Logic and Translation
  6. 6Revision History

LVC: Low-Voltage CMOS Logic and Translation

Key Features: SN74LVCxxxx

  • Huge portfolio of logic functions
  • LVC: 4+ channels per package
  • Overvoltage tolerant inputs allow unidirectional down-translation with any function
  • High-drive outputs (up to 32 mA)
  • Up to 250-Mbps operation
  • Ioff supports partial-power-down mode operation.
  • Packaging Options:
    • SOIC
    • TSSOP
    • VQFN
    • SOP
    • SSOP

Key Features: SN74LVCxGxxxx

  • Put one, two, or three channels of any logic function right where they are needed
  • Configurable gates available ('57, '58, '97, '98, '99 functions)
  • Overvoltage tolerant inputs allow unidirectional down-translation with any gate or buffer
  • High-drive outputs (up to 32 mA)
  • Up to 250-Mbps operation
  • Ioff supports partial-power-down mode operation
  • Packaging Options:
    • SOT-23
    • SC70
    • X2SON
    • SOT-5X3
    • SON
    • DSBGA

Key Features: SN74LVCxTxxxx

  • LVCxT: Up and down translation across 1.65 V to 5.5 V
  • 1, 2, 8, or 16 channels per device
  • High-drive outputs (up to 32 mA)
  • Up to 250-Mbps operation
  • Ioff supports partial-power-down mode operation

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