SFFS061 February   2021 TLV759P

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)

3 Failure Mode Distribution (FMD)

The failure mode distribution estimation for TLV759P in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.

Table 3-1 Die Failure Modes and Distribution
Die Failure Modes Failure Mode Distribution (%)
VOUT High (Following VIN) 20.83%
VOUT Not in Specification or Removed from Load 8.33%
VOUT Low (No Output) 33.33%
No Failures 29.17%
Output always enabled 4.17%
Possible FB pin damage 4.17%