SLAA534A June 2013 – June 2020
DWARF3 registers use register name operators (see Section 2.6.1 of the DWARF3 standard). The operand of a register name operator is a register number representing an architecture register. Table 10-1 defines mappings from DWARF3 register numbers/names to MSP430 registers.
DWARF Name | MSP430 ISA Register | Description |
---|---|---|
0-15 | R0-R15 | See Table 3-1 for details. |