SLAU908B October   2023  – May 2024 MSPM0C1104

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Hardware Overview
    2. 2.2 Power Requirements
    3. 2.3 XDS110 Debug Probe
    4. 2.4 Measure Current Draw of the MSPM0C1104
    5. 2.5 Clocking
    6. 2.6 BoosterPack Plug-in Module Pinout
  9. 3Software
    1. 3.1 Software Development Options
    2. 3.2 Out-of-box GUI
    3. 3.3 CCS Cloud
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  11. 5Additional Information
    1. 5.1 Trademarks
  12. 6Revision History

2.5 Clocking

The internal SYSOSC is 24MHz as default at the accuracy of 2.5%. The MCLK is sourced by 32MHz SYSOSC at default. CPUCLK is sourced directly from MCLK in RUN mode and disabled in other modes. The low-power clock (ULPCLK) can be sourced by MCLK and active in RUN and SLEEP mode by configuration. For more clock tree details, see Section 2.3 Clock Module (CKM) of the MSPM0 C-Series Microcontrollers Technical Reference Manual.