SLUUCH6B september   2022  – september 2023 TPS543B22

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 Background
    2. 1.2 Before You Begin
    3. 1.3 Performance Characteristics Summary
  5. 2Configurations and Modifications
    1. 2.1 Output Voltage
    2. 2.2 Switching Frequency (FSEL Pin)
    3. 2.3 Current Limit, Soft-Start Time, and Internal Compensation (MODE Pin)
    4. 2.4 Adjustable UVLO
  6. 3Test Setup and Results
    1. 3.1  Input/Output Connections
    2. 3.2  Efficiency
    3. 3.3  Output Voltage Regulation
    4. 3.4  Load Transient and Loop Response
    5. 3.5  Output Voltage Ripple
    6. 3.6  Input Voltage Ripple
    7. 3.7  Synchronizing to a Clock
    8. 3.8  Start-up and Shutdown with EN
    9. 3.9  Start-up and Shutdown with VIN
    10. 3.10 Start-up Into Pre-Bias
    11. 3.11 Hiccup Current Limit
    12. 3.12 Thermal Performance
  7. 4Board Layout
    1. 4.1 Layout
  8. 5Schematic and Bill of Materials
    1. 5.1 Schematic
    2. 5.2 Bill of Materials
  9. 6Revision History

Thermal Performance

Figure 3-29 through Figure 3-32 show the temperature rise of the TPS543B22 ICs at full 20-A load. Figure 3-29 and Figure 3-30 have only one TPS543B22 on and loaded. Figure 3-31 and Figure 3-32 have both TPS543B22s loaded. A minimum of a 10 minute soak time was used before taking each measurement.

GUID-20230817-SS0I-MJVT-KP3G-LNKQVNC7596X-low.svgFigure 3-29 U1 Thermal Performance – 20-A Load and U2 Off
GUID-20230817-SS0I-GNRB-D0RC-XJWXBS7VKRGV-low.svgFigure 3-31 U1 Thermal Performance – Both 20-A Load
GUID-20230817-SS0I-GSKM-R2VT-2TRVGCGZGN1N-low.svgFigure 3-30 U2 Thermal Performance – 20-A Load and U1 Off
GUID-20230817-SS0I-TFND-N65V-LKS0DJP8JZJF-low.svgFigure 3-32 U2 Thermal Performance – Both 20-A Load