SLVUA85A June   2014  – May 2021 TPS65261

 

  1.   Trademarks
  2. 1Background
  3. 2TPS65261 Schematic
  4. 3Board Layout
    1. 3.1 EVM Layout
  5. 4Bench Test Setup Conditions
    1. 4.1 Headers Description and Jumper Placement
    2. 4.2 Jumpers and Switches
  6. 5Power-Up Procedure
  7. 6Bill of Materials
  8. 7Revision History

4.1 Headers Description and Jumper Placement

Figure 4-1 illustrates the header description and jumper placement on the EVM.

GUID-0028263C-6564-4234-850F-5BEBCF12DD7E-low.png Figure 4-1 Header Descriptions and Jumper Placement

Test points:

A: LX of VOUT1

B: LX of VOUT2

C: LX of VOUT3

VOUT1, VOUT2, VOUT3, VIN, PGOOD, RESET, V7V

Table 4-1 lists the I/O connections.

Table 4-1 Input/Output Connection
Number Function Description
J1 BUCK1 connector Output of BUCK1
J2 BUCK2 connector Output of BUCK2
J3 BUCK3 connector Output of BUCK3
J4 VIN connector Apply power supply to this connector