SLVUCK2A january   2023  – april 2023 TPS7H3302-SEP

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Description
    1. 2.1 Related Information
    2. 2.2 Typical Applications
    3. 2.3 Features
    4. 2.4 Performance Specification Summary
  5. 3Test Setup
    1. 3.1 Equipment
      1. 3.1.1 Power Supplies
      2. 3.1.2 Load #1
    2. 3.2 EVM Connectors and Test Points
    3. 3.3 Testing Procedure
      1. 3.3.1 EVM Bode Plot Measurement Setup
      2. 3.3.2 EVM Transient Test
  6. 4Board Layout
  7. 5Schematic
  8. 6Bill of Materials
  9. 7Related Documentation
  10. 8Revision History

2.3 Features

This EVM has the following features:

  • Input core voltage VDD supports 2.5-V rail and 3.3-V rail
  • VLDOIN, VDDQ voltage range: 0.9 V–3.5 V
  • Dynamic performance evaluation features:
    • Sink and source integrated load switches for transient load step emulation
    • Configurable load step and slew rate control by on-board resistors
      CAUTION: The default EVM configuration using the built-in transient test circuit supports testing the DDR4 at ±1.5 A, DDR3 at ±1.875 A, DDR2 at ±2.25 A. To evaluate the DDR node, or different currents for DDR2, DDR3, DDR3L, and DDR4 the total resistance of resistors R6-R9, and R17-R20 needs to be changed to not exceed device maximum ratings.
  • Jumper J14 (pins 1 and 2) for device enable. (enabled without J14 installed)
  • Convenient test points for probing PGOOD, CLK_IN, and loop response testing
  • Optional placeholders for VDDQSNS to VLDOIN filter when not using independent VDDQSNS source