SNAU287 November   2023

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
  6. 2Hardware
    1. 2.1 Evaluation Setup Requirement
    2. 2.2 Configuring the EVM
      1. 2.2.1 Configuring the Power Supply
      2. 2.2.2 Configuring the Control Pins
      3. 2.2.3 Configuring the Clock Outputs
      4. 2.2.4 Using the USB Interface Connection
      5. 2.2.5 EVM Quick Start Guide
    3. 2.3 Modes of Operation
  7. 3Software
    1. 3.1 Using TICS Pro with the LMK3H0102EVM
      1. 3.1.1 Using the LMK3H0102 Wizard
        1. 3.1.1.1 Frequency Plan
        2. 3.1.1.2 Output Formats
        3. 3.1.1.3 Output Enable Pin
        4. 3.1.1.4 OTP Options
        5. 3.1.1.5 Review
        6. 3.1.1.6 Design Report
      2. 3.1.2 Live Debugger
        1. 3.1.2.1 FODs
        2. 3.1.2.2 Outputs
        3. 3.1.2.3 Others
      3. 3.1.3 Programming
        1. 3.1.3.1 Registers
        2. 3.1.3.2 OTP Configuration
      4. 3.1.4 Help
        1. 3.1.4.1 Contact TI
    2. 3.2 Using TI’s USB2ANY Module for In-System Programming of the LMK3H0102
      1. 3.2.1 USB2ANY Board Connections
      2. 3.2.2 Ordering a USB2ANY Module
  8. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials
  9. 5Additional Information
    1.     Trademarks
  10. 6Related Documentation

3.1.1.2 Output Formats

GUID-20230428-SS0I-XRXM-51KP-WFTHPZJQNKND-low.pngFigure 3-3 LMK3H0102 Wizard Output Formats Page

The Output Formats page allows for configuring the formats of the device outputs. For each output type selected, the images in the GUI change to provide a visual aid. For differential outputs, these are diagrams showing the termination required. For single-ended outputs, these are diagrams showing the behavior of the P and N pins of the output.

If an LP-HCSL output is selected, Amplitude field sets the typical LP-HCSL amplitude. If an LVDS output is selected, then this field is hidden as the settings do not apply to LVDS. For LVCMOS outputs, the phase is selectable, and the field changes to a Phase field. The OUTx_P and OUTx_N pins can be individually enabled, in phase, or opposite phase.

For all differential outputs, the output slew rate can be configured using the Slew Rate field. For single-ended outputs, the phase and LVCMOS voltages are selectable, and the Slew Rate field changes to an LVCMOS Voltage field. The LVCMOS Voltage is not register-backed, but instead is meant to provide a visual by displaying the pin voltage in the block diagram.

Each output can be individually enabled or disabled on this page. A disabled output can be pulled to GND internally or tr-istated. By default, any disabled outputs are pulled to GND.