SNOSC68C April   2012  – September 2015 LM3533

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Control Bank Mapping
        1. 7.3.1.1 High-Voltage Control Banks (A/B)
        2. 7.3.1.2 Low-Voltage Control Banks (C, D, E, And F)
      2. 7.3.2 Pattern Generator
      3. 7.3.3 Ambient Light Sensor Interface
      4. 7.3.4 PWM Input
      5. 7.3.5 HWEN Input
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1  High-Voltage Boost Converter
        1. 7.4.1.1 High-Voltage Current Sinks (HVLED1 And HVLED2)
        2. 7.4.1.2 High-Voltage Current String Biasing
        3. 7.4.1.3 Boost Switching-Frequency Select
      2. 7.4.2  Integrated Charge Pump
        1. 7.4.2.1 Charge Pump Disabled
        2. 7.4.2.2 Automatic Gain
        3. 7.4.2.3 Automatic Gain (Flying Capacitor Detection)
        4. 7.4.2.4 1× Gain
        5. 7.4.2.5 2× Gain
        6. 7.4.2.6 Low-Voltage Current Sinks (LVLED1 to LVLED5)
        7. 7.4.2.7 Low-Voltage LED Biasing
      3. 7.4.3  LED Current Mapping Modes
        1. 7.4.3.1 Exponential Mapping
        2. 7.4.3.2 Linear Mapping
      4. 7.4.4  LED Current Ramping
        1. 7.4.4.1 Start-Up/Shutdown Ramp
        2. 7.4.4.2 Run-Time Ramp
      5. 7.4.5  Brightness Register Current Control
      6. 7.4.6  PWM Control
        1. 7.4.6.1 PWM Input Frequency Range
        2. 7.4.6.2 PWM Input Polarity
      7. 7.4.7  ALS Current Control
        1. 7.4.7.1 ALS Brightness Zones (Zone Boundaries)
        2. 7.4.7.2 Zone Boundary Hysteresis
        3. 7.4.7.3 Zone Target Registers (ALSM1, ALSM2, ALSM3)
        4. 7.4.7.4 PWM Input in ALS Mode
      8. 7.4.8  ALS Functional Blocks
        1. 7.4.8.1  ALS Input
        2. 7.4.8.2  Analog Output Ambient Light Sensors (ALS Gain Setting Resistors)
        3. 7.4.8.3  PWM Output Ambient Light Sensors (Internal Filtering)
        4. 7.4.8.4  Internal 8-Bit ADC
        5. 7.4.8.5  ALS Averager
        6. 7.4.8.6  Initializing the ALS
        7. 7.4.8.7  ALS Algorithms
        8. 7.4.8.8  ALS Rules
        9. 7.4.8.9  Direct ALS Control
        10. 7.4.8.10 Up-Only Control
        11. 7.4.8.11 Down-Delay Control
      9. 7.4.9  Pattern Generator
        1. 7.4.9.1 Delay Time
        2. 7.4.9.2 Rise Time
        3. 7.4.9.3 Fall Time
        4. 7.4.9.4 High Period
        5. 7.4.9.5 Low Period
        6. 7.4.9.6 Low-Level Brightness
        7. 7.4.9.7 High-Level Brightness
        8. 7.4.9.8 ALS Controlled Pattern Current
        9. 7.4.9.9 Interrupt Output Mode
      10. 7.4.10 Fault Flags/Protection Features
        1. 7.4.10.1 Open LED String (HVLED)
        2. 7.4.10.2 Shorted LED String (HVLED)
        3. 7.4.10.3 Open LED (LVLED)
        4. 7.4.10.4 Shorted LED (LVLED)
        5. 7.4.10.5 Overvoltage Protection (Inductive Boost)
        6. 7.4.10.6 Current Limit (Inductive Boost)
        7. 7.4.10.7 Current Limit (Charge Pump)
    5. 7.5 Programming
      1. 7.5.1 I2C-Compatible Interface
        1. 7.5.1.1 Start and Stop Conditions
        2. 7.5.1.2 I2C-Compatible Address
        3. 7.5.1.3 Transferring Data
    6. 7.6 Register Maps
      1. 7.6.1 LM3533 Register Descriptions
        1. 7.6.1.1 Pattern Generator Registers
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Boost Converter Maximum Output Power (Boost)
        2. 8.2.2.2 Peak Current Limited
        3. 8.2.2.3 Output Voltage Limited
        4. 8.2.2.4 Maximum Output Power (Charge Pump)
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Boost
        1. 10.1.1.1 Boost Output Capacitor Selection and Placement
        2. 10.1.1.2 Schottky Diode Placement
        3. 10.1.1.3 Inductor Placement
        4. 10.1.1.4 Boost Input Capacitor Selection and Placement
      2. 10.1.2 Charge Pump
        1. 10.1.2.1 Flying Capacitor (CP)
        2. 10.1.2.2 Output Capacitor (CPOUT)
        3. 10.1.2.3 Charge Pump Input Capacitor Placement
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

10 Layout

10.1 Layout Guidelines

10.1.1 Boost

The LM3533 inductive boost converter sees a high switched voltage (up to 40 V) at the SW pin, and a step current (up to 1 A) through the Schottky diode and output capacitor each switching cycle. The high switching voltage can create interference into nearby nodes due to electric field coupling (I = CdV/dt). The large step current through the diode and the output capacitor can cause a large voltage spike at the SW pin and the OVP pin due to parasitic inductance in the step current conducting path (V = Ldi/dt). Board layout guidelines are geared towards minimizing this electric field coupling and conducted noise. Figure 53 highlights these two noise-generating components.

LM3533 30135727.gif Figure 53. LM3533 Inductive Boost Converter Showing Pulsed Voltage at SW (High Dv/Dt) and Current Through Schottky and COUT(High Di/Dt)

The following list details the main (layout sensitive) areas of the LM3533 inductive boost converter in order of decreasing importance:

  1. Output Capacitor:
    • Schottky Cathode to COUT+
    • COUT− to GND
  2. Schottky Diode:
    • SW Pin to Schottky Anode
    • Schottky Cathode to COUT+
  3. Inductor:
    • SW Node PCB capacitance to other traces
  4. Input Capacitor:
    • CIN+ to IN pin

10.1.1.1 Boost Output Capacitor Selection and Placement

The LM3533 inductive boost converter requires a 1-µF output capacitor. The voltage rating of the capacitor depends on the selected OVP setting. For the 16-V setting a 16-V capacitor must be used. For the 24-V setting a 25-V capacitor must be used. For the 32-V setting, a 35-V capacitor must be used. For the 40-V setting a 50-V capacitor must be used. Pay careful attention to the capacitor's tolerance and DC bias response. For proper operation the degradation in capacitance due to tolerance, DC bias, and temperature, must stay above 0.4 µF. This might require placing two devices in parallel in order to maintain the required output capacitance over the device operating range, and series LED configuration.

Because the output capacitor is in the path of the inductor current discharge path, a high-current step from 0 to IPEAK is seen each time the switch turns off and the Schottky diode turns on. Any inductance along this series path from the cathode of the diode through COUT and back into the LM3533 GND pin contributes to voltage spikes (VSPIKE = LP_ × dI/dt) at SW and OUT. These spikes can potentially over-voltage the SW pin, or feed through to GND. To avoid this, COUT+ must be connected as closely as possible to the cathode of the Schottky diode, and COUT− must be connected as closely as possible to the LM3533 device's GND pin. The best placement for COUT is on the same layer as the LM3533 to avoid any vias that can add excessive series inductance.

10.1.1.2 Schottky Diode Placement

The Schottky diode must have a reverse breakdown voltage greater than the LM3533 maximum output voltage (see Overvoltage Protection (Inductive Boost)). Additionally, the diode must have an average current rating high enough to handle the LM3533’s maximum output current, and at the same time the diode's peak current rating must be high enough to handle the peak inductor current. Schottky diodes are required due to their lower forward voltage drop (0.3 V to 0.5 V) and their fast recovery time.

In the LM3533 boost circuit the Schottky diode is in the path of the inductor current discharge; thus, the Schottky diode sees a high-current step from 0 to IPEAK each time the switch turns off and the diode turns on. Any inductance in series with the diode causes a voltage spike (VSPIKE = LP_ × dI/dt) at SW and OUT. This can potentially over-voltage the SW pin, or feed through to VOUT and through the output capacitor and into GND. Connecting the anode of the diode as closely as possible to the SW pin and the cathode of the diode as closely as possible to COUT+ reduces the inductance (LP_) and minimize these voltage spikes.

10.1.1.3 Inductor Placement

The node where the inductor connects to the LM3533’s SW pin has 2 issues. First, a large switched voltage (0 to VOUT + VF_SCHOTTKY) appears on this node every switching cycle. This switched voltage can be capacitively coupled into nearby nodes. Second, there is a relatively large current (input current) on the traces connecting the input supply to the inductor and connecting the inductor to the SW pin. Any resistance in this path can cause voltage drops that can negatively affect efficiency and reduce the input operating voltage range.

To reduce the capacitive coupling of the signal on SW into nearby traces, the SW pin-to-inductor connection must be minimized in area. This limits the PCB capacitance from SW to other traces. Additionally, high-impedance nodes that are more susceptible to electric field coupling need to be routed away from SW and not directly adjacent or beneath. This is especially true for traces such as SCL, SDA, HWEN, PWM, and possibly ALS. A GND plane placed directly below SW dramatically reduces the capacitance from SW into nearby traces.

Lastly, limit the trace resistance of the VBATT-to-inductor connection and from the inductor-to-SW connection, by use of short, wide traces.

10.1.1.4 Boost Input Capacitor Selection and Placement

The input capacitor on the LM3533 filters the voltage ripple due to the switching action of the inductive boost and the capacitive charge pump doubler. A ceramic capacitor of at least 2.2 µF must be used.

For the LM3533 boost converter, the input capacitor filters the inductor current ripple and the internal MOSFET driver currents during turn on of the internal power switch. The driver current requirement can range from 50 mA at 2.7 V to over 200 mA at 5.5 V with fast durations of approximately 10 ns to 20 ns. This appears as high di/dt current pulses coming from the input capacitor each time the switch turns on. Close placement of the input capacitor to the IN pin and to the GND pin is critical because any series inductance between IN and CIN+ or CIN− and GND can create voltage spikes that could appear on the VIN supply line and in the GND plane.

Close placement of the input bypass capacitor at the input side of the inductor is also critical. The source impedance (inductance and resistance) from the input supply, along with the input capacitor of the LM3533, form a series RLC circuit. If the output resistance from the source (RS) is low enough the circuit is underdamped and has a resonant frequency (typically the case). Depending on the size of LS the resonant frequency could occur below, close to, or above the LM3533 switching frequency. This can cause the supply current ripple to be:

  1. Approximately equal to the inductor current ripple when the resonant frequency occurs well above the LM3533 switching frequency;
  2. Greater than the inductor current ripple when the resonant frequency occurs near the switching frequency; or
  3. Less than the inductor current ripple when the resonant frequency occurs well below the switching frequency. Figure 54 shows the series RLC circuit formed from the output impedance of the supply and the input capacitor.

The circuit is redrawn for the AC case where the VIN supply is replaced with a short to GND, and the LM3533 plus inductor is replaced with a current source (ΔIL). Equation 1 is the criteria for an underdamped response. Equation 2 is the resonant frequency. Equation 3 is the approximated supply current ripple as a function of LS, RS, and CIN.

As an example, consider a 3.6-V supply with 0.1 Ω of series resistance connected to CIN through 50 nH of connecting traces. This results in an under-damped input-filter circuit with a resonant frequency of 712 kHz. Because both the 1-MHz and 500-kHz switching frequency options lie close to the resonant frequency of the input filter, the supply current ripple is probably larger than the inductor current ripple. In this case, using equation 3, the supply current ripple can be approximated as 1.68 times the inductor current ripple (using a 500-kHz switching frequency) and 0.86 times the inductor current ripple using a 1-MHz switching frequency. Increasing the series inductance (LS) to 500 nH causes the resonant frequency to move to around 225 kHz, and the supply current ripple to be approximately 0.25 times the inductor current ripple (500-kHz switching frequency) and 0.053 times for a 1-MHz switching frequency.

LM3533 30135728_nosc68.gif Figure 54. Input RLC Network

10.1.2 Charge Pump

The charge pump basically has three areas of concern regarding component placement:

  1. The flying capacitor (CP)
  2. The output capacitor (CPOUT)
  3. The input capacitor

10.1.2.1 Flying Capacitor (CP)

The charge pump flying capacitor must quickly charge up to the input voltage and then supply the current to the output every switching cycle. Because the charge pump switching frequency is 1 MHz, the capacitor must be a low-inductance and low-resistive ceramic. Additionally, there must be a low-inductive connection from CP to the LM3533 flying capacitor terminals C+ and C−. This is accomplished by placing CP as close as possible to the LM3533 and on the same layer to avoid vias.

10.1.2.2 Output Capacitor (CPOUT)

The charge pump output capacitor sees the switched charge from the flying capacitor every switching cycle (1 MHz). This fast switching action requires that a low inductive and low resistive capacitor (ceramic) be used and that CPOUT be connected to the LM3533 CPOUT pin with a low inductive connection. This is done by placing CPOUT as close as possible to the CPOUT and GND pins of the LM3533 and on the same layer as the LM3533 to avoid vias.

10.1.2.3 Charge Pump Input Capacitor Placement

The input capacitor for the LM3533 charge pump is the same one used for the LM3533 inductive boost converter (see Boost Input Capacitor Selection and Placement).

10.2 Layout Example

LM3533 30135785.gif Figure 55. LM3533 Example Layout