SNVAA94 November   2023 LM5113-Q1 , LMG1205 , LMG1210

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. Introduction
  5. Bootstrap Overcharge
  6. Modeling Bootstrap Overcharge
  7. Changing Bootstrap Components
  8. Zener Diode Method
  9. Schottky Diode Method
  10. Overvoltage Clamp Method
  11. Active Switch Method
  12. Synchronous GaN Bootstrap Method
  13. 10Other Methods of Preventing Bootstrap Overcharge
    1. 10.1 Reducing Dead Time
    2. 10.2 Opting for a Bias Supply
    3. 10.3 Adjusting for Gate Voltage
  14. 11Summary
  15. 12References

Introduction

The industry is increasingly adopting GaN FETs to improve switching characteristics over silicon MOSFETs in electric vehicles, server power supplies, and motor drivers. GaN FETs enable operation at higher switching frequencies, which can help to reduce system size, cost, and weight.

The 48-V to 12-V DC/DC converter plays a vital role in many power applications and is often achieved using an LLC, synchronous buck, or buck-boost topology. One common factor between these half-bridge topologies is that the topologies require dead time, or nonconducting time, where both the high-side and low-side FETs are off.

The load current (IL) must continue circulating during the dead time. This mode of operation, where the FET Vgs is 0 V and a negative current is flowing, is called the third quadrant operation. For more details about third quadrant operation, see Does GaN Have a Body Diode?—Understanding the Third Quadrant Operation of GaN. Figure 1-1 shows an example half-bridge buck converter with the relevant parameters. Figure 1-2 shows the main issue; a large negative voltage is created on HS during the dead time.

GUID-20231012-SS0I-48X0-XHRC-RCNQ1MMHQD34-low.svg Figure 1-1 Simplified Schematic of a Half-bridge Buck Converter Showing the Relevant Parameters to Bootstrap Overcharge
GUID-20231012-SS0I-4F5H-5MCK-3QFSPZZNNT6K-low.svg Figure 1-2 Waveform Capture Showing the Relationship Between IL, Dead Time, and Negative HS Voltage

This negative voltage has to do with the properties of GaN FETs. Unlike silicon power FETs, GaN FETs do not have a parasitic P–N junction that creates a body diode. In a MOSFET, the body diode handles the third-quadrant operation, acting like a diode with a forward voltage (VF) of approximately 0.7 V. The negative voltage created on HS when a MOSFET conducts in the third quadrant is approximately the VF of the body diode. In GaN FETs, the lack of a body diode means the behavior is different.

Third-quadrant operation happens when Vgs is low, usually at 0 V, and current is forced through the GaN FET. The FET is off in this state and is viewed as a large resistor. A voltage is created when current is forced to flow through this large resistor. This voltage is from the source to the drain of the device (VSD). The drain must be negative respective to the ground because the source is tied to the ground. The lowest voltage node acts as the source of the device because of the bidirectional characteristics of the GaN FET. The gate voltage is 0 V, and the drain (now source) is negative, so there is a Vgs created on the device. Once this Vgs exceeds the threshold voltage (Vth) of the GaN FET, the FET turns on and becomes a small resistance again. This stops the voltage increase, ultimately resulting in a negative voltage roughly equal to the Vth of the GaN FET appearing on the HS node. This process is called self-commutation because the device turns itself on.

Self-commutation has two main differences from the body-diode conduction of the MOSFET. The first difference is that the self-commutative current conducts in the channel of the device rather than the parasitic body diode. A reverse recovery charge (Qrr) is built into the body diode when current is conducted in the P-N body diode. However, there is no Qrr when current conducts in the channel. The second difference is that self-commutation results in a much higher negative voltage than body-diode conduction. The higher voltage is because the GaN FET Vth is much higher than a body-diode VF.

Many designers like to think of a GaN FET as having a body diode with a high forward voltage and no reverse recovery charge because of these differences. The central gap in this diode model is that the model ignores the role of Vg in determining the negative voltage. The negative HS voltage increases if designers use a negative Vgs to prevent a false turn-on, as many designers do.

Equation 1 estimates the negative HS voltage for any GaN FET. Most manufacturers include a plot for use, as shown in Figure 1-3.

Equation 1. VSD=Vth+ISD×RDSon-VG(off)
GUID-20231012-SS0I-JV23-0W4B-4H1WCMFSKD1G-low.svg Figure 1-3 Plot Showing the Third Quadrant Vds Voltage Over Load and Different Vgs Voltages