SNVU697 September   2020 LMQ62440-Q1

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 LMQ62440-Q1 Synchronous Step-Down Voltage Converter
  3. 2Quick Start
  4. 3Detailed Descriptions
  5. 4EVM Performance
    1. 4.1 Board Efficiency, Load Regulation, Transient, and Steady-state Curves
    2. 4.2 EMI Test Results
    3. 4.3 Thermal Picture
  6. 5EVM Schematic Entry
  7. 6Bill of Materials
  8. 7Board Layout

Detailed Descriptions

This section describes the connectors on the EVM and how to properly connect, set up, and use the EVM. See Figure 2-1 for a top view of the EVM.

    VOUTOutput voltage of the converter

    Connect the load between the VOUT connector and the GND. Connect the loading device with short, thick wires to handle the required output current. For measuring output ripple, measurement should done across the output capacitor with low inductance ground loop on probe, or active probe.

    GNDGround of the converter

    The GND connections next to VIN, VIN_EMI, and VOUT connectors are meant for current return path for the supply voltage and load, respectively. Other GND connectors are for signal measurement and probing.

    VINInput voltage to the converter

    Connect the power supply between VIN and GND connectors as power input to the device. The voltage range must be higher than 3.9 V for the device to start up. VIN higher than 6 V provides regulated 5-V output voltage. VIN must be no higher than 36 V to avoid damaging the device. After start-up, the device stays active until VIN drops below 3 V. The current limit on the supply must be high enough to provide the needed supply current. Otherwise, the supply voltage will not maintain the desired voltage. The supply voltage must be connected to the board with short and thick wires to handle the pulsing input current. If long cables are used to power up the board, damping must be provided by adding CFLT3 and RFLT3 to avoid oscillation between the cable parasitic inductance and the low-ESR ceramic capacitors.

    VIN-EMIInput voltage to input filter of the converter

    If the input filter is desired between the input supply and the LMQ62440-Q1, connect the supply voltage between VIN_EMI and GND_EMI. The supply voltage must be connected to the board with short and thick wires to handle pulsing input current. The input filter consists of the following: CF1, CF2, CF3, CF4, and LF1. CD1 and RD1 are provided as placeholders for a possible damping network. The output of the filter is connected to VIN, which is connected to the VIN pins of the LMQ62440-Q1 and the input capacitors. Conducted EMI arises from the normal operation of switching circuits. The ON and OFF actions of the power switches generate large discontinuous currents. The discontinuous currents are present at the input side of buck converters. Voltage ripple generated by discontinuous currents can be conducted to the voltage supply for the buck converter. Without filtering, excessive input voltage ripple can compromise operation of other circuits connected to this source. The input filter helps smooth out the voltage perturbations leading to less noise at the power source.

    GND-EMIGround return for the input filter

    This is the current return path for the supply connected to VIN_EMI. It provides a short-loop connection to the input filter capacitors to best filter the conducted noise generated from the PCB. Use the VIN_EMI and GND_EMI connection if a conducted EMI test is desired.

    CLKFor clock synchronization

    The CLK input connector is designed for external clock input to the MODE/SYNC pin. Switching action of the buck is synchronized to the external clock when it is present. The operation mode changes to forced PWM mode and disables spread spectrum automatically, maintaining a constant switching frequency at light load. This signal must be at least 3.3 Vpp, but not exceed the pin absolute maximum voltage rating. Refer to the LMQ62440-Q1 Automotive 3-V to 36-V, 4-a, Low-Noise Synchronous Step-Down Converter Data Sheet for more detailed timing information.

    ENTest point to monitor the EN pin of the device

    This test point is used to monitor the voltage on the device EN pin. By default, the EN pin is connected to the mid-point of an enable divider. Note that the lower resistor in this divider, RENB, is not populated since it affects input bias current.

    PGTest point to monitor the PGOOD pin

    The PGOOD flag indicates whether the output voltage is within the regulation band. The PGOOD pin of the device is an open-drain output and it is pulled up to VOUT on this board through a pullup resistor. This flag is high impedance when the output voltage is in regulation.

    VinjTo aid when making bode plots

    There is a low value resistor, Rinj, between VOUT and this node. This feedback divider of the board is connected to this node as well. Stimulus can be applied between this node and VOUT when taking measurements for bode plots.

    VOUTSKelvin sensing for VOUT

    This connector is provided to allow VOUT to be measured more easily. For measuring output ripple, measurement must done across output capacitor with low inductance ground loop on probe, or active probe.

    VINSKelvin sensing for VIN

    This connector is provided to allow VIN to be measured more easily.