SPRUI04F july 2015 – april 2023
The --debug_software_pipeline option places additional software pipeline feedback in the generated assembly file. This information includes a single scheduled iteration view of the software pipelined loop.
If software pipelining succeeds for a given loop, and the --debug_software_pipeline option was used during the compilation process, a register usage table is added to the software pipelining information comment block in the generated assembly code.
The numbers on each row represent the cycle number within the loop kernel.
Each column represents one register on the TMS320C6000. The registers are labeled in the first three rows of the register usage table and should be read columnwise.
An * in a table entry indicates that the register indicated by the column header is live on the kernel execute packet indicated by the cycle number labeling each row.
An example of the register usage table follows:
;* Searching for software pipeline schedule at
;* ii = 15 Schedule found with 2 iterations in parallel
;*
;* Register Usage Table:
;* +---------------------------------+
;* |AAAAAAAAAAAAAAAA|BBBBBBBBBBBBBBBB|
;* |0000000000111111|0000000000111111|
;* |0123456789012345|0123456789012345|
;* |----------------+----------------|
;* 0: |*** **** |*** ****** |
;* 1: |**** **** |*** ****** |
;* 2: |**** **** |*** ****** |
;* 3: | ** ***** |*** ****** |
;* 4: | ** ***** |*** ****** |
;* 5: | ** ***** |*** ****** |
;* 6: | ** ***** |********** |
;* 7: |*** ***** |** ******* |
;* 8: |**** ***** |*********** |
;* 9: |********** |** ******** |
;* 10: |*********** |** ********* |
;* 11: |*********** |** ********* |
;* 12: |********** |************ |
;* 13: |**** ***** |** ******* * |
;* 14: |*** ***** |*** ****** * |
;* +---------------------------------+
;*
This example shows that on cycle 0 (first execute packet) of the loop kernel, registers A0, A1, A2, A6, A7, A8, A9, B0, B1, B2, B4, B5, B6, B7, B8, and B9 are all live during this cycle.