SWRA571B August   2017  – August 2020 CC1310 , CC1310 , CC1312PSIP , CC1312PSIP , CC1312R , CC1312R , CC1314R10 , CC1314R10 , CC1350 , CC1350 , CC1352P , CC1352P , CC1352P7 , CC1352P7 , CC1352R , CC1352R

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2IQ Dump Patch
    1. 2.1 Recommended Operating Limits
      1. 2.1.1 Register Overrides
      2. 2.1.2 API Configuration
  5. 3Building a Software Example
  6. 4Testing the Patch Using the Built-In Test Pattern
  7. 5References
  8. 6Revision History

2 IQ Dump Patch

The IQ Dump patch (rf_patch_mce_iqdump.h) can run in two different modes; IQFifoBlind and IQFifoSync. IQFifoBlind mode starts copying IQ samples immediately while IQFifoSync mode starts copying IQ samples after a sync word has been detected. The mode of operation is selected by the MCE_RFE override (see Table 2-2). For both modes, IQ samples are copied through the RF Core’s internal FIFO to one or more partial read RX entries in the system RAM. The application simply waits for an RX_ENTRY_DONE interrupt saying that a partial read entry is full.

The IQ sample rate is fixed to 4 times oversampling and the IQ sample size is 12 bits. This means that each IQ pair will occupy 3 bytes in RAM in the format shown in Table 2-1. The format is signed meaning that MSB is the sign bit (two’s complement format).

Table 2-1 Format of IQ Samples Stored in RAM
Byte Bit Definition
0 I7 I6 I5 I4 I3 I2 I1 I0
1 Q3 Q2 Q1 Q0 I11 I10 I9 I8
2 Q11 Q10 Q9 Q8 Q7 Q6 Q5 Q4

The patch has a built-in test pattern where the IQ samples are replaced with two counter values. The I-sample is replaced with an increasing counter value and the Q-sample is replaced with a decreasing counter value. The test pattern is enabled by the following register override:

HW_REG_OVERRIDE(0x52B4, 0x070D) // CC13x0
HW_REG_OVERRIDE(0x5328, 0x070D) // CC13x2