TIDUF42 January   2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Terminology
    2. 1.2 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 EnDAT 2.2 Interface
      2. 2.3.2 SDFM Interface
      3. 2.3.3 EPWM Interface
      4. 2.3.4 ICSS-PRU IEP
      5. 2.3.5 EtherCAT CiA402 Velocity Control
  9. 3System Design
  10. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Software Requirements
    3. 4.3 Test Setup
    4. 4.4 Test Results
  11. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
    2. 5.2 Tools and Software
    3. 5.3 Documentation Support
    4. 5.4 Support Resources
    5. 5.5 Trademarks
  12. 6About the Author

2.3.3 EPWM Interface

Table 2-3 and Table 2-4 show the EPWM0-2 Signal Motor 1 and EPWM3-5 Signal Motor 2 data, respectively.

Table 2-3 EPWM0-2 Signal Motor 1
AM243x LP (PIN NUMBER) BP CONNECTORS BLDC BP SIGNAL NAME
GPIO1_64(B16) J5.49 nPWM_EN_M1 DRV1 enable
GPMC0_AD8(U18) J4.36 DRV1 EPWM High C DRV1 PWM High C
GPMC0_AD9(U20) J4.35 DRV1 EPWM Low C DRV1 PWM Low C
GPMC0_AD5(T20) J4.38 DRV1 EPWM High B DRV1 PWM High B
GPMC0_AD6(T18) J4.37 DRV1 EPWM Low B DRV1 PWM Low B
GPMC0_AD3(V21) J4.40 DRV1 EPWM High A DRV1 PWM High A
GPMC0_AD4(U21) J4.39 DRV1 EPWM Low A DRV1 PWM Low A
Table 2-4 EPWM3-5 Signal Motor 2
AM243x LP (PIN NUMBER) BP CONNECTORS BLDC BP SIGNAL NAME
GPIO1_65(B15) J5.50 nPWM_EN_M2 DRV2 enable
FSI_TX0_CLK (P21) J8.79 DRV2 EPWM High C DRV2 PWM High C
FSI_TX0_D0(Y18) J8.80 DRV2 EPWM Low C DRV2 PWM Low C
TEST_LED3_RED(D1) J8.75 DRV2 EPWM High B DRV2 PWM High B
TEST_LED4_GREEN(F3) J8.76 DRV2 EPWM Low B DRV2 PWM Low B
TEST_LED1_GREEN(U19) J8.77 DRV2 EPWM High A DRV2 PWM High A
FSI_RX0_D1(V20) J8.78 DRV2 EPWM Low A DRV2 PWM Low A

EPWM Setting (init_pwms):

  • Configure the SYNCI, SYNCO mapping to tie the three PWM groups together
  • Have PWM0 SYNC from Time Sync Router 38
    • CSL_REG32_WR(CSL_TIMESYNC_EVENT_INTROUTER0_CFG_BASE + ((38 × 4) + 4), (0x10000 | 29));
  • Time Sync Router input 29 (ICSSG1 IEP0 SYNC0) → Time Sync Router output 38
    • CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_EPWM0_CTRL, (2 << CSL_MAIN_CTRL_MMR_CFG0_EPWM0_CTRL_SYNCIN_SEL_SHIFT));
    • TIMESYNC_INTRTR0_IN_29: PRU_ICSSG1_PR1_EDC0_SYNC0_OUT_0 (IEP0 sync event 0)
    • timesync_event_introuter_out_38: epwm0_sync.input2
    • TI E2E: [FAQ] AM64x: What is the Time Sync Router for? How do I use it?
  • Have PWM3 SYNC from Time Sync Router 39
    • CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_EPWM3_CTRL, (2 << CSL_MAIN_CTRL_MMR_CFG0_EPWM3_CTRL_SYNCIN_SEL_SHIFT));
  • Time Sync Router input 29 (ICSSG1 IEP0 SYNC0) → Time Sync Router output 39
    • CSL_REG32_WR(CSL_TIMESYNC_EVENT_INTROUTER0_CFG_BASE + ((39 × 4) + 4), (0x10000 | 29));
    • TIMESYNC_INTRTR0_IN_29: PRU_ICSSG1_PR1_EDC0_SYNC0_OUT_0 (IEP0 sync event 0)
    • timesync_event_introuter_out_39: epwm3_sync.input2
  • Have PWM6 SYNC from Time Sync Router 40
    • CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_EPWM6_CTRL, (2 << CSL_MAIN_CTRL_MMR_CFG0_EPWM6_CTRL_SYNCIN_SEL_SHIFT));
  • Time Sync Router input 29 (ICSSG1 IEP0 SYNC0) → Time Sync Router output 40
    • CSL_REG32_WR(CSL_TIMESYNC_EVENT_INTROUTER0_CFG_BASE + ((40 * 4) + 4), (0x10000 | 29));
    • TIMESYNC_INTRTR0_IN_29: PRU_ICSSG1_PR1_EDC0_SYNC0_OUT_0 (IEP0 sync event 0)
    • timesync_event_introuter_out_40: epwm6_sync.input2
    • Force SW sync for EPWM0. Other PWMs are synchronized through hardware synchronized daisy-chain
      • Epwm_tbTriggerSwSync(gEpwm0BaseAddr);
        • HW_WR_FIELD16(((gEpwm0BaseAddr + PWMSS_EPWM_OFFSET) + PWMSS_EPWM_TBCTL), PWMSS_EPWM_TBCTL_SWFSYNC, (uint16_t)PWMSS_EPWM_TBCTL_SWFSYNC_FORCE_SYNC);
  • Set EPWM to 50 kHz:
    • appEpwmCfg.epwmOutFreq = gEpwmOutFreq;
    • App_epwmConfig(&appEpwmCfg, &epwm2PrdVal, &epwm2CmpAVal);

EPWM0 Interrupt:

  • hwiPrms.intNum = EPWM0_INTR;
  • hwiPrms.callback = &App_epwmIntrISR;

EPWM0 Output Data:

  • gEpwmPrdVal