SLVSAE4A July   2010  – August 2014 TPS53128

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
      1. 7.2.1 16
      2. 7.2.2 17
    3. 7.3 Feature Description
      1. 7.3.1  PWM Operation
      2. 7.3.2  Light-Load Condition
      3. 7.3.3  Drivers
      4. 7.3.4  PWM Frequency And Adaptive On-Time Control
      5. 7.3.5  5-Volt Regulator
      6. 7.3.6  Soft Start
      7. 7.3.7  Pre-Bias Support
      8. 7.3.8  Output Discharge Control
      9. 7.3.9  Over Current Limit
      10. 7.3.10 Over/Under Voltage Protection
      11. 7.3.11 UVLO Protection
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • D-CAP2™ Mode Control
    • Fast Transient Response
    • No External Parts Required for Loop Compensation
    • Compatible With Ceramic Output Capacitors
  • High Initial Reference Accuracy (±1%)
  • Low Output Ripple
  • Wide Input Voltage Range: 4.5 V to 24 V
  • Output Voltage Range: 0.76 V to 5.5 V
  • Low-Side RDS(ON) Loss-Less Current Sensing
  • Adaptive Gate Drivers with Integrated Boost Diode
  • Adjustable Soft Start
  • Non-Sinking Pre-Biased Soft Start
  • 350-kHz Switching Frequency
  • Cycle-by-Cycle Over-Current Limiting Control
  • 30-mV to 300-mV OCP Threshold Voltage
  • Thermally Compensated OCP by 4000 ppm/°C at ITRIP
  • Auto-Skip Eco-mode™ for High Efficiency at Light Load

2 Applications

  • Point-of-Load Regulation in Low Power Systems for Wide Range of Applications
    • Digital TV Power Supply
    • Networking Home Terminal
    • Digital Set-Top Box (STB)
    • DVD Player/Recorder
    • Gaming Consoles

3 Description

The TPS53128 is a dual, adaptive on-time D-CAP2™ mode synchronous buck controller. The part enables system designers to cost effectively complete the suite of various end equipment's power bus regulators with a low external component count and low standby consumption. The main control loop for the TPS53128 uses the D-CAP2™ Mode topology which provides a very fast transient response with no external component.

The TPS53128 also has a proprietary circuit that enables the device to adapt not only low equivalent series resistance (ESR) output capacitors such as POSCAP/SP-CAP, but also ceramic capacitor. The fixed frequency emulated adaptive on-time control supports seamless operation between PWM mode at heavy load condition and reduced frequency operation at light load for high efficiency down to milliampere range. The part provides a convenient and efficient operation with conversion voltages from 4.5 V to 24 V and output voltage from 0.76 V to
5.5 V.

The TPS53128 is available in 4-mm x 4-mm 24 pin QFN (RGE) or 24 pin TSSOP (PW) packages, and is specified from -40°C to 85°C ambient temperature range.

Table 1. Device Information(1)

DEVICE NAME PACKAGE BODY SIZE
TPS53128 VQFN (24) 4.4 mm x 7.8 mm
TSSOP (24) 4 mm x 4 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.
TPS53128 qfn_app_digrm_lvsae4.gif
TPS53128 tssop_app_digrm_lvsae4.gif