SBAS834A April 2017  – April 2017 ADS8584S


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Family Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements: CONVST Control
    7. 7.7 Timing Requirements: Data Read Operation
    8. 7.8 Timing Requirements: Parallel Data Read Operation, CS and RD Tied Together
    9. 7.9 Timing Requirements: Parallel Data Read Operation, CS and RD Separate
    10. 7.10Timing Requirements: Serial Data Read Operation
    11. 7.11Timing Requirements: Byte Mode Data Read Operation
    12. 7.12Timing Requirements: Oversampling Mode
    13. 7.13Timing Requirements: Exit Standby Mode
    14. 7.14Timing Requirements: Exit Shutdown Mode
    15. 7.15Switching Characteristics: CONVST Control
    16. 7.16Switching Characteristics: Parallel Data Read Operation, CS and RD Tied Together
    17. 7.17Switching Characteristics: Parallel Data Read Operation, CS and RD Separate
    18. 7.18Switching Characteristics: Serial Data Read Operation
    19. 7.19Switching Characteristics: Byte Mode Data Read Operation
    20. 7.20Typical Characteristics
  8. Detailed Description
    1. 8.1Overview
    2. 8.2Functional Block Diagram
    3. 8.3Feature Description
      1. 8.3.1Analog Inputs
      2. 8.3.2Analog Input Impedance
      3. 8.3.3Input Clamp Protection Circuit
      4. 8.3.4Programmable Gain Amplifier (PGA)
      5. 8.3.5Third-Order, Low-Pass Filter (LPF)
      6. 8.3.6ADC Driver
      7. 8.3.7Digital Filter and Noise
      8. 8.3.8Reference
        1. Reference
        2. Reference
        3. One VREF to Multiple Devices
      9. 8.3.9ADC Transfer Function
    4. 8.4Device Functional Modes
      1. 8.4.1Device Interface: Pin Description
        1. REFSEL (Input)
        2. RANGE (Input)
        3. STBY (Input)
        4. PAR/SER/BYTE SEL (Input)
        5. CONVSTA, CONVSTB (Input)
        6. RESET (Input)
        7. RD/SCLK (Input)
        8. CS (Input)
        9. OS[2:0]
        10. (Output)
        11. (Output)
        12. SEL
      2. 8.4.2Device Modes of Operation
        1. Modes
          1. Mode
          2. Mode
        2. Control
          1. Sampling on All Input Channels
          2. Sampling Two Sets of Input Channels
        3. Read Operation
          1. Data Read
          2. Byte Data Read
          3. Data Read
          4. Read During Conversion
        4. Mode of Operation
  9. Application and Implementation
    1. 9.1Application Information
    2. 9.2Typical Application
      1. 9.2.14-Channel, Data Acquisition System (DAQ) for Power Automation
        1. Requirements
        2. Design Procedure
        3. Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1Layout Guidelines
    2. 11.2Layout Example
  12. 12Device and Documentation Support
    1. 12.1Documentation Support
      1. 12.1.1Related Documentation
    2. 12.2Receiving Notification of Documentation Updates
    3. 12.3Community Resources
    4. 12.4Trademarks
    5. 12.5Electrostatic Discharge Caution
    6. 12.6Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Orderable Information


  • 16-Bit ADC with Integrated Analog Front-End
  • Simultaneous Sampling: 4-Channels
  • Pin-Programmable Bipolar Inputs: ±10 V and ±5 V
  • High Input Impedance: 1 MΩ
  • 5-V Analog Supply: 2.3-V to 5-V Digital Supply
  • Overvoltage Input Clamp with 7-kV ESD
  • Low-Drift, On-Chip Reference (2.5 V) and Buffer
  • Excellent Performance:
    • 330-kSPS Max Throughput per Channel
    • DNL: ±0.35 LSB; INL: ±0.45 LSB
    • SNR: 96.4 dB; THD: −114 dB
  • Over Temperature Performance:
    • Max Offset Drift: 3 ppm/°C
    • Gain Drift: 6 ppm/°C
  • On-Chip Digital Filter for Oversampling
  • Flexible Parallel, Byte, and Serial Interface
  • Temperature Range: –40°C to +125°C
  • Package: 64-Pin LQFP


  • Monitoring and Control for Power Grids
  • Protection Relays
  • Multi-Phase Motor Controls
  • Industrial Automation and Controls
  • Multichannel Data Acquisition Systems


The ADS8584S device is an 4-channel, integrated data acquisition (DAQ) system based on a simultaneous-sampling, 16-bit successive approximation (SAR) analog-to-digital converter (ADC) operating at a maximum of 330 kSPS per channel. The device features a complete analog front-end for each channel, including a programmable gain amplifier (PGA) with high input impedance of 1 MΩ, input clamp, low-pass filter, and an ADC input driver. The device also features a low-drift, precision reference with a buffer to drive the ADC. A flexible digital interface supporting serial, parallel, and parallel byte communication enables the device to be used with a variety of host controllers.

The ADS8584S can be configured to accept ±10-V or ±5-V true bipolar inputs using a single 5-V supply. The high input impedance allows direct connection with sensors and transformers, thus eliminating the need for external driver circuits. The high performance and accuracy, along with zero-latency conversions offered by this device, also make the ADS8584S a great choice for many industrial automation and control applications.

Device Information(1)

ADS8584SLQFP (64)10.00 mm × 10.00 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

Simplified Block Diagram

ADS8584S fpd_ADS8586S_BAS834.gif