SNOSD37 March 2017 LMG1205

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1Absolute Maximum Ratings
    2. 6.2ESD Ratings
    3. 6.3Recommended Operating Conditions
    4. 6.4Thermal Information
    5. 6.5Electrical Characteristics
    6. 6.6Switching Characteristics
    7. 6.7Typical Characteristics
  7. Detailed Description
    1. 7.1Overview
    2. 7.2Functional Block Diagram
    3. 7.3Feature Description
      1. 7.3.1Input and Output
      2. 7.3.2Start-up and UVLO
      3. 7.3.3HS Negative Voltage and Bootstrap Supply Voltage Clamping
      4. 7.3.4Level Shift
    4. 7.4Device Functional Modes
  8. Application and Implementation
    1. 8.1Application Information
    2. 8.2Typical Application
      1. 8.2.1Design Requirements
      2. 8.2.2Detailed Design Procedure
        1. 8.2.2.1VDD Bypass Capacitor
        2. 8.2.2.2Bootstrap Capacitor
        3. 8.2.2.3Power Dissipation
      3. 8.2.3Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1Layout Guidelines
    2. 10.2Layout Examples
  11. 11Device and Documentation Support
    1. 11.1Documentation Support
      1. 11.1.1Related Documentation
    2. 11.2Receiving Notification of Documentation Updates
    3. 11.3Community Resources
    4. 11.4Trademarks
    5. 11.5Electrostatic Discharge Caution
    6. 11.6Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Features

  • Independent High-Side and Low-Side
    TTL Logic Inputs
  • 1.2-A Peak Source, 5-A Sink Current
  • High-Side Floating Bias Voltage Rail
    Operates up to 100 VDC
  • Internal Bootstrap Supply Voltage Clamping
  • Split Outputs for Adjustable
    Turnon, Turnoff Strength
  • 0.6-Ω Pulldown, 2.1-Ω Pullup Resistance
  • Fast Propagation Times (35 ns Typical)
  • Excellent Propagation Delay Matching
    (1.5 ns Typical)
  • Supply Rail Undervoltage Lockout
  • Low Power Consumption

Applications

  • Current-Fed Push-Pull Converters
  • Half and Full-Bridge Converters
  • Synchronous Buck Converters
  • Two-Switch Forward Converters
  • Forward with Active Clamp Converters

Description

The LMG1205 is designed to drive both the high-side and the low-side enhancement mode Gallium Nitride (GaN) FETs in a synchronous buck, boost, or half-bridge configuration. The device has an integrated 100-V bootstrap diode and independent inputs for the high-side and low-side outputs for maximum control flexibility. The high-side bias voltage is generated using a bootstrap technique and is internally clamped at 5 V, which prevents the gate voltage from exceeding the maximum gate-source voltage rating of enhancement mode GaN FETs. The inputs of the LMG1205 are TTL logic compatible and can withstand input voltages up to 14 V regardless of the VDD voltage. The LMG1205 has split-gate outputs, providing flexibility to adjust the turnon and turnoff strength independently.

In addition, the strong sink capability of the LMG1205 maintains the gate in the low state, preventing unintended turnon during switching. The LMG1205 can operate up to several MHz. The LMG1205 is available in a 12-pin DSBGA package that offers a compact footprint and minimized package inductance.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
LMG1205DSBGA (12)2.00 mm × 2.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Application Diagram

LMG1205 simplified_application_diagram_01_snosd37.gif