SBAS796 July 2017 ONET2804TLP
PRODUCTION DATA.
PAD | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
ADR0 | 54 | Digital input | 2-wire interface address programming pin. Leave this pad open for a default address of 0001100. Grounding this pad changes the first address bit to a 1 (0001101). |
ADR1 | 53 | Digital input | 2-wire interface address programming pin. Leave this pad open for a default address of 0001100. Grounding this pad changes the second address bit to a 1 (0001110). |
AMPL | 6 | Digital input | 3-state input for amplitude control of all four channels. VCC: 500-mVPP differential output swing Open: 300-mVPP differential output swing (default) GND: 250-mVPP differential output swing |
FILTER1 | 12, 14 | Analog output | FILTERx is the bias voltage for the photodiode cathode. These pads are biased to VCC – 100 mV. |
FILTER2 | 19, 21 | ||
FILTER3 | 26, 28 | ||
FILTER4 | 33, 35 | ||
GAIN | 8 | Digital input | 3-state input for gain control of all four channels. VCC: Minimum transimpedance Open: Default transimpedance GND: Medium transimpedance |
GND | 11, 15, 18, 22, 25, 29, 32, 36, 47, 48, 51, 52, 55, 56, 59, 60, 63, 64, 67, 68, 71, 72, 75, 76 | Supply | Circuit ground. All GND pads are connected on the die. Bonding all pads is recommended, except for pads 11, 15, 18, 22, 25, 29, 32, and 36. |
I2CENA | 5 | Digital input | 2-wire control option. Leave the pad unconnected for pad control of the device. Two-wire control can be enabled by applying a high signal to the pad. |
IN1 | 13 | Analog input | INx is the data input to corresponding TIA channel (connect to photodiode anode) |
IN2 | 20 | ||
IN3 | 27 | ||
IN4 | 34 | ||
NC | 16, 17, 23, 24, 30, 31, 42, 61, 62, 69 | No connection | Do not connect |
NRESET | 70 | Digital input | Used to reset the 2-wire state machine and registers. Leave open for normal operation and set low to reset the 2-wire interface. |
OUT1– | 73 | Analog output | Inverted CML data output for channel x. On-chip, 50-Ω, back-terminated to VCC. |
OUT2– | 65 | ||
OUT3– | 57 | ||
OUT4– | 49 | ||
OUT1+ | 74 | Analog output | Noninverted CML data output for channel x. On-chip, 50-Ω, back-terminated to VCC. |
OUT2+ | 66 | ||
OUT3+ | 58 | ||
OUT4+ | 50 | ||
RATE | 7 | Digital input | 3-state input for bandwidth control of all four channels. VCC: Increase the bandwidth Open: 21-GHz bandwidth (default) GND: Reduce the bandwidth |
RSSI1 | 9 | Analog output | Indicates the strength of the received signal (RSSI) for channel x if the photodiode is biased from FILTERx. The analog output current is proportional to the input data amplitude. Connect to an external resistor to ground (GND). For proper operation, ensure that the voltage at the RSSIx pad does not exceed VCC – 0.65 V. If the RSSI feature is not used, leave these pads open. |
RSSI2 | 10 | ||
RSSI3 | 37 | ||
RSSI4 | 38 | ||
SCL | 40 | Digital input | 2-wire interface serial clock input. Includes a 10-kΩ pullup resistor to VCC. |
SDA | 39 | Digital input/output | 2-wire interface serial data input. Includes a 10-kΩ pullup resistor to VCC. |
TRSH | 41 | Digital input | 3-state input for the threshold control. VCC: Crossing point shifted down Open: No threshold adjustment (default) GND: Crossing point shifted up |
VCCI1 | 4 | Supply | 2.8 V to 3.47 V supply voltage for the input TIAx stage. |
VCCI2 | 3 | ||
VCCI3 | 44 | ||
VCCI4 | 43 | ||
VCCO1 | 1 | Supply | 2.8 V to 3.47 V supply voltage for the AGCx and CMLx amplifiers. |
VCCO2 | 2 | ||
VCCO3 | 45 | ||
VCCO4 | 46 |