SLOS913A October   2015  – February 2017 SN55HVD75-EP

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics: 20 Mbps Device, Bit Time ≥50 ns
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
        4. 9.2.1.4 Receiver Failsafe
        5. 9.2.1.5 Transient Protection
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 External Transient Protection
        2. 9.2.2.2 Isolated Bus Node Design
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Parameter Measurement Information

Input generator rate is 100 kbps, 50% duty cycle, rise or fall time is less than 6 ns, output impedance is 50 Ω.

SN55HVD75-EP s0301-01_llsE11.gif Figure 6. Measurement of Driver Differential Output Voltage With Common-Mode Load
SN55HVD75-EP s0302-01_llsE11.gif Figure 7. Measurement of Driver Differential and Common-Mode Output With RS-485 Load
SN55HVD75-EP pmi_dr_sw_llsE11.gif Figure 8. Measurement of Driver Differential Output Rise and Fall Times and Propagation Delays
SN55HVD75-EP s0304-01_llsE11.gif
D at 3 V to test non-inverting output, D at 0 V to test inverting output.
Figure 9. Measurement of Driver Enable and Disable Times With Active High Output and Pulldown Load
SN55HVD75-EP s0305-01_llsE11.gif
D at 0 V to test non-inverting output, D at 3 V to test inverting output.
Figure 10. Measurement of Driver Enable and Disable Times With Active Low Output and Pullup Load
SN55HVD75-EP s0306-01_llsE11.gif Figure 11. Measurement of Receiver Output Rise and Fall Times and Propagation Delays
SN55HVD75-EP s0307-01_llsE11.gif Figure 12. Measurement of Receiver Enable and Disable Times With Driver Enabled
SN55HVD75-EP s0308-01_llsE11.gif Figure 13. Measurement of Receiver Enable Times With Driver Disabled