SM320C80
- Single-Chip Parallel Multiple Instruction/Multiple Data (MIMD) Digital Signal Processor (DSP)
- More Than Two Billion RISC-Equivalent Operations per Second
- Master Processor (MP)
- 32-Bit Reduced Instruction Set Computing (RISC) Processor
- IEEE-754 Floating-Point Capability
- 4K-Byte Instruction Cache
- 4K-Byte Data Cache
- Four Parallel Processors (PP)
- 32-Bit Advanced DSPs
- 64-Bit Opcode Provides Many Parallel Operations per Cycle
- 2K-Byte Instruction Cache and 8K-Byte Data RAM per PP
- Transfer Controller (TC)
- 64-Bit Data Transfers
- Up to 400 Megabytes per Second (MBps) Transfer Rate
- 32-Bit Addressing
- Direct DRAM/VRAM Interface With Dynamic Bus Sizing
- Intelligent Queuing and Cycle Prioritization
- Video Controller (VC)
- Provides Video Timing and Video Random-Access Memory (VRAM) Control
- Dual-Frame Timers for Two Simultaneous Image-Capture and/or Display Systems
- Big- or Little-Endian Operation
- 50K-Byte On-Chip RAM
- 4G-Byte Address Space
- 20-ns Cycle Time
- 3.3-V Operation
- IEEE Standard 1149.1 Test Access Port (JTAG)
- Operating Temperature Range
–55°C to 125°C - M-Temperature
–40°C to 85°C - A-Temperature
IEEE Standard 1149.1–1990, IEEE Standard Test Access Port and Boundary-Scan Architecture
The SMJ320C80 is a single-chip, MIMD parallel processor capable of performing over two billion operations per second. It consists of a 32-bit RISC master processor with a 100-MFLOPS (million floating-point operations per second) IEEE floating-point unit, four 32-bit parallel processing digital signal processors (DSPs), a transfer controller with up to 400-MBps off-chip transfer rate, and a video controller. All the processors are coupled tightly through an on-chip crossbar that provides shared access to on-chip RAM. This performance and programmability make the C80 ideally suited for video, imaging, and high-speed telecommunications applications.
技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | SMJ320C80 Digital Signal Processor 数据表 (Rev. B) | 2002年 6月 30日 | |||
更多文献资料 | SM320C80/SMJ320C80 (Rev. C) | 2000年 8月 7日 | ||||
用户指南 | TMS320C8x Emulator Installation Guide (Rev. A) | 1997年 2月 1日 | ||||
应用手册 | Modified Goertzel Algorithm in DTMF Detection Using the TMS320C80 DSP | 1996年 6月 1日 | ||||
应用手册 | Acoustic Echo Cancellation Algorithms and Implementation on the TMS320C80 | 1996年 5月 1日 | ||||
用户指南 | TMS320C80 to TMS320C82 Software Compatibility User's Guide | 1995年 11月 1日 | ||||
应用手册 | TMS320C8x System-Level Synopsis (Rev. B) | 1995年 9月 1日 | ||||
用户指南 | TMS320C8x (MVP) Video Controller User's Guide (Rev. A) | 1995年 1月 1日 |
设计和开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
PROCESSORS-3P-SEARCH — 基于 Arm® 的 MPU、基于 Arm 的 MCU 和 DSP 第三方搜索工具
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- 工具包括 IDE/编译器、调试和跟踪、仿真和建模软件以及闪存编程器。
- 操作系统包括 TI 处理器支持的操作系统。
- 应用软件是指应用特定的软件,包括在 TI 处理器上运行的中间件和库。
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封装 | 引脚 | 下载 |
---|---|---|
CFP (HFH) | 320 | 查看选项 |
CPGA (GF) | 305 | 查看选项 |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点