SLVSBY7 February 2017 DAC8775

PRODUCTION DATA. 

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1Absolute Maximum Ratings
    2. 7.2ESD Ratings
    3. 7.3Recommended Operating Conditions
    4. 7.4Thermal Information
    5. 7.5Electrical Characteristics
    6. 7.6Timing Requirements: Write and Readback Mode
    7. 7.7Typical Characteristics
  8. Detailed Description
    1. 8.1Overview
    2. 8.2Functional Block Diagram
    3. 8.3Feature Description
      1. 8.3.1 Current Output Stage
      2. 8.3.2 Voltage Output Stage
      3. 8.3.3 Buck-Boost Converter
        1. 8.3.3.1Buck-Boost Converters Outputs
        2. 8.3.3.2Selecting and Enabling Buck-Boost Converters
        3. 8.3.3.3Configurable Clamp Feature and Current Output Settling Time
          1. 8.3.3.3.1Default Mode - CCLP[1:0] = "00" - Current Output Only
          2. 8.3.3.3.2Fixed Clamp Mode - CCLP[1:0] = "01" - Current and Voltage Output
          3. 8.3.3.3.3Auto Learn Mode - CCLP[1:0] = "10" - Current Output Only
          4. 8.3.3.3.4High Side Clamp (HSCLMP)
        4. 8.3.3.4Buck-Boost Converters and Open Circuit Current Output
      4. 8.3.4 Analog Power Supply
      5. 8.3.5 Digital Power Supply
      6. 8.3.6 Internal Reference
      7. 8.3.7 Power-On-Reset
      8. 8.3.8 ALARM Pin
      9. 8.3.9 Power GOOD Bits
      10. 8.3.10Status Register
      11. 8.3.11Status Mask
      12. 8.3.12Alarm Action
      13. 8.3.13Watchdog Timer
      14. 8.3.14Programmable Slew Rate
      15. 8.3.15HART Interface
    4. 8.4Device Functional Modes
      1. 8.4.1Serial Peripheral Interface (SPI)
        1. 8.4.1.1Stand-Alone Operation
        2. 8.4.1.2Daisy-Chain Operation
      2. 8.4.2SPI Shift Register
      3. 8.4.3Write Operation
      4. 8.4.4Read Operation
      5. 8.4.5Updating the DAC Outputs and LDAC Pin
        1. 8.4.5.1Asynchronous Mode
        2. 8.4.5.2Synchronous Mode
      6. 8.4.6Hardware RESET Pin
      7. 8.4.7Hardware CLR Pin
      8. 8.4.8Frame Error Checking
      9. 8.4.9DAC Data Calibration
        1. 8.4.9.1DAC Data Gain and Offset Calibration Registers
    5. 8.5Register Maps
      1. 8.5.1DAC8775 Commands
      2. 8.5.2Register Maps and Bit Functions
        1. 8.5.2.1 No Operation Register (address = 0x00) [reset = 0x0000]
        2. 8.5.2.2 Reset Register (address = 0x01) [reset = 0x0000]
        3. 8.5.2.3 Reset Config Register (address = 0x02) [reset = 0x0000]
        4. 8.5.2.4 Select DAC Register (address = 0x03) [reset = 0x0000]
        5. 8.5.2.5 Configuration DAC Register (address = 0x04) [reset = 0x0000]
        6. 8.5.2.6 DAC Data Register (address = 0x05) [reset = 0x0000]
        7. 8.5.2.7 Select Buck-Boost Converter Register (address = 0x06) [reset = 0x0000]
        8. 8.5.2.8 Configuration Buck-Boost Register (address = 0x07) [reset = 0x0000]
        9. 8.5.2.9 DAC Channel Calibration Enable Register (address = 0x08) [reset = 0x0000]
        10. 8.5.2.10DAC Channel Gain Calibration Register (address = 0x09) [reset = 0x0000]
        11. 8.5.2.11DAC Channel Offset Calibration Register (address = 0x0A) [reset = 0x0000]
        12. 8.5.2.12Status Register (address = 0x0B) [reset = 0x1000]
        13. 8.5.2.13Status Mask Register (address = 0x0C) [reset = 0x0000]
        14. 8.5.2.14Alarm Action Register (address = 0x0D) [reset = 0x0000]
        15. 8.5.2.15User Alarm Code Register (address = 0x0E) [reset = 0x0000]
        16. 8.5.2.16Reserved Register (address = 0x0F) [reset = N/A]
        17. 8.5.2.17Write Watchdog Timer Register (address = 0x10) [reset = 0x0000]
        18. 8.5.2.18Device ID Register (address = 0x11) [reset = 0x0000]
        19. 8.5.2.19Reserved Register (address 0x12 - 0xFF) [reset = N/A]
  9. Application and Implementation
    1. 9.1Application Information
      1. 9.1.1Buck-Boost Converter External Component Selection
      2. 9.1.2Voltage and Current Ouputs on a Shared Terminal
      3. 9.1.3Optimizing Current Output Settling time with Auto learn Mode
      4. 9.1.4Protection for Industrial Transients
      5. 9.1.5Implementing HART with DAC8775
    2. 9.2Typical Application
      1. 9.2.11W Power Dissipation, Quad Channel, EMC and EMI Protected Analog Output Module with Adaptive Power Management
      2. 9.2.2Design Requirements
      3. 9.2.3Detailed Design Procedure
      4. 9.2.4Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1Layout Guidelines
    2. 11.2Layout Example
  12. 12Device and Documentation Support
    1. 12.1Documentation Support
      1. 12.1.1Related Documentation
    2. 12.2Receiving Notification of Documentation Updates
    3. 12.3Community Resources
    4. 12.4Trademarks
    5. 12.5Electrostatic Discharge Caution
    6. 12.6Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • RWF|72
Orderable Information

Features

  • Output Current:
    • 0 mA to 24 mA; 3.5 mA to 23.5 mA; 0 mA to 20 mA; 4 mA to 20 mA; ±24 mA
  • Output Voltage (with/without 20% over-range):
    • 0 V to 5 V; 0 V to 10 V; ±5 V; ±10 V
    • 0 V to 6 V; 0 V to 12 V; ±6 V; ±12 V
  • Adaptive Power Management
  • Single Wide Power Supply Pin (12 V – 36 V )
  • ±0.1% FSR Total Unadjusted Error (TUE)
  • DNL: ±1 LSB Max
  • Internal 5-V Reference (10 ppm/°C max)
  • Internal 5-V Digital Power Supply Output
  • CRC/Frame Error Check, Watchdog Timer
  • Thermal Alarm, Open/Short Circuit for System Reliability
  • Safe Actions on Alarm Condition
  • Auto Learn Load Detection
  • Wide Temperature Range: –40°C to +125°C

Applications

  • 4-mA to 20-mA Current Loops
  • Analog Output Modules
  • Programmable Logic Controllers (PLCs)
  • Building Automation
  • Sensor Transmitters
  • Process Control

Description

The DAC8775 is a quad-channel precision, fully integrated, 16-bit, digital-to-analog converter (DAC) with adaptive power management, and is designed to meet the requirements of industrial control applications. The adaptive power management circuit, when enabled, minimizes the power dissipation of the chip. When programmed as a current output, the supply voltage on the current output driver is regulated between 4.5 V and 32 V based on continuous feedback of voltage on the current output pin via an integrated buck/boost converter. When programmed as a voltage output, this circuit generates a programmable supply voltage for the voltage output stage (±15 V). DAC8775 also contains an LDO to generate the digital supply (5 V) from a single power supply pin.

DAC8775 is also implemented with a Highway Addressable Remote Transducer (HART) Signal Interface to superimpose an external HART signal on the current output. The slew rate of the current output DAC is register programmable. The device can operate with a single external power supply of +12 V to +36 V using the integrated buck/boost converters or with external power supplies when the buck/boost converters are disabled.

Device Information(1)

PART NUMBERPACKAGEBODY SIZE (NOM)
DAC8775VQFN (72)10.00 mm x 10.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Block Diagram

DAC8775 BlockDia_SLVSBY7_DAC8775.gif