Detalles del producto

Sample rate (max) (Msps) 62 Resolution (Bits) 12 Number of input channels 1 Interface type Parallel CMOS, TTL Analog input BW (MHz) 170 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 354 Architecture Pipeline SNR (dB) 66 ENOB (bit) 10.6 SFDR (dB) 82 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 62 Resolution (Bits) 12 Number of input channels 1 Interface type Parallel CMOS, TTL Analog input BW (MHz) 170 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 354 Architecture Pipeline SNR (dB) 66 ENOB (bit) 10.6 SFDR (dB) 82 Operating temperature range (°C) -40 to 85 Input buffer No
LQFP (NEY) 32 81 mm² 9 x 9
  • Single Supply Operation
  • Low Power Consumption
  • Power Down Mode
  • On-Chip Reference Buffer

Key Specifications

  • Resolution: 12 Bits
  • Conversion Rate: 62 MSPS (min)
  • Bandwidth: 170 MHz
  • DNL: ±0.5 LSB(typ)
  • INL: ±1.0 LSB(typ)
  • SNR: 66 dB(typ)
  • SFDR: 78 dB(typ)
  • Data Latency: 6 Clock Cycles
  • Supply Voltage: +3.3V ± 300 mV
  • Power Consumption, 62 MHz: 354 mW(typ)

All trademarks are the property of their respective owners.

  • Single Supply Operation
  • Low Power Consumption
  • Power Down Mode
  • On-Chip Reference Buffer

Key Specifications

  • Resolution: 12 Bits
  • Conversion Rate: 62 MSPS (min)
  • Bandwidth: 170 MHz
  • DNL: ±0.5 LSB(typ)
  • INL: ±1.0 LSB(typ)
  • SNR: 66 dB(typ)
  • SFDR: 78 dB(typ)
  • Data Latency: 6 Clock Cycles
  • Supply Voltage: +3.3V ± 300 mV
  • Power Consumption, 62 MHz: 354 mW(typ)

All trademarks are the property of their respective owners.

The ADC12L063 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 62 Megasamples per second (MSPS), minimum. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. Operating on a single 3.3V power supply, this device consumes just 354 mW at 62 MSPS, including the reference current. The Power Down feature reduces power consumption to just 50 mW.

The differential inputs provide a full scale input swing equal to ±VREF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. For ease of use, the buffered, high impedance, single-ended reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format is 12-bit offset binary.

This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40°C to +85°C.

The ADC12L063 is a monolithic CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at 62 Megasamples per second (MSPS), minimum. This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic performance. Operating on a single 3.3V power supply, this device consumes just 354 mW at 62 MSPS, including the reference current. The Power Down feature reduces power consumption to just 50 mW.

The differential inputs provide a full scale input swing equal to ±VREF with the possibility of a single-ended input. Full use of the differential input is recommended for optimum performance. For ease of use, the buffered, high impedance, single-ended reference input is converted on-chip to a differential reference for use by the processing circuitry. Output data format is 12-bit offset binary.

This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40°C to +85°C.

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Documentación técnica

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* Data sheet ADC12L063 12-Bit 62 MSPS 354 mW ADC w/Internal Sample-and-Hold datasheet (Rev. E) 04 mar 2013
User guide ADC12040/010/020/L063 12-Bit, 40/10/20/62 Msps ADC User Guide 20 feb 2012

Diseño y desarrollo

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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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LQFP (NEY) 32 Ver opciones

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