Inicio Lógica y traducción de voltaje Traductores de tensión y desplazadores de nivel Traductores de tensión de dirección fija
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Traductores de tensión de dirección fija

CD40109B-Q1

ACTIVO

Sensor CMOS Quad de nivel de tensión de baja a alta (clasificación 20V) de catálogo automotriz

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CD40109B-Q1

ACTIVO
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Detalles del producto

Technology family CD4000 Bits (#) 4 Configuration 4 Ch A to B 0 Ch B to A High input voltage (min) (V) 3 High input voltage (max) (V) 18 Vout (min) (V) 0 Vout (max) (V) 18 Data rate (max) (Mbps) 24 IOH (max) (mA) -6.8 IOL (max) (mA) -6.8 Supply current (max) (µA) 18 Features 54.59, 79.56 Input type Standard CMOS Output type Balanced CMOS, Push-Pull Rating Automotive Operating temperature range (°C) -40 to 125
Technology family CD4000 Bits (#) 4 Configuration 4 Ch A to B 0 Ch B to A High input voltage (min) (V) 3 High input voltage (max) (V) 18 Vout (min) (V) 0 Vout (max) (V) 18 Data rate (max) (Mbps) 24 IOH (max) (mA) -6.8 IOL (max) (mA) -6.8 Supply current (max) (µA) 18 Features 54.59, 79.56 Input type Standard CMOS Output type Balanced CMOS, Push-Pull Rating Automotive Operating temperature range (°C) -40 to 125
SOP (NS) 16 79.56 mm² 10.2 x 7.8
  • Qualified for Automotive Applications
  • Independent of Power Supply Sequence Considerations
    • VCC Can Exceed VDD
    • Input Signals can Exceed Both VCC and VDD
  • Up and Down Level-Shifting Capability
  • Three-State Outputs With Separate Enable Controls
  • Standardized Symmetrical Output Characteristics
  • 100% Tested for Quiescent Current at 20 V
  • Maximum Input Current:
    • 1 µA at 18 V Over Full Package-Temperature Range
    • 100 nA at 18 V and 25°C
  • Noise Margin (Full Package-Temperature Range):
    • 1 V at VCC = 5 V, VDD = 10 V
    • 2 V at VCC = 10 V, VDD = 15 V
  • 5-V, 10-V, and 15-V Parametric Ratings
  • Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard specifications for Description of ’B’ Series CMOS Devices"
  • Latch-Up Performance Meets 50 mA per JESD 78, Class I
  • APPLICATIONS
    • High-or-Low Level-Shifting With Three-State Outputs for Unidirectional or Bidirectional Bussing
    • Isolation of Logic Subsystem Using Separate Power Supplies from Supply Sequencing, Supply Loss, and Supply Regulation Considerations
  • Qualified for Automotive Applications
  • Independent of Power Supply Sequence Considerations
    • VCC Can Exceed VDD
    • Input Signals can Exceed Both VCC and VDD
  • Up and Down Level-Shifting Capability
  • Three-State Outputs With Separate Enable Controls
  • Standardized Symmetrical Output Characteristics
  • 100% Tested for Quiescent Current at 20 V
  • Maximum Input Current:
    • 1 µA at 18 V Over Full Package-Temperature Range
    • 100 nA at 18 V and 25°C
  • Noise Margin (Full Package-Temperature Range):
    • 1 V at VCC = 5 V, VDD = 10 V
    • 2 V at VCC = 10 V, VDD = 15 V
  • 5-V, 10-V, and 15-V Parametric Ratings
  • Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard specifications for Description of ’B’ Series CMOS Devices"
  • Latch-Up Performance Meets 50 mA per JESD 78, Class I
  • APPLICATIONS
    • High-or-Low Level-Shifting With Three-State Outputs for Unidirectional or Bidirectional Bussing
    • Isolation of Logic Subsystem Using Separate Power Supplies from Supply Sequencing, Supply Loss, and Supply Regulation Considerations

CD40109B contains four low-to-high-voltage level-shifting circuits. Each circuit will shift a low-voltage digital-logic input signal (A, B, C, D) with logical 1 = VCC and logical 0 = VSS to a high-voltage output signal (E, F, G, H) with logical 1 = VDD and logical 0 = VSS.

The RCA-CD40109, unlike other low-to-high level-shifting circuits, does not require the presence of the high-voltage supply (VDD) before the application of either the low-voltage supply (VCC) or the input signals. There are no restrictions on the sequence of application of VDD, VCC, or the input signals. In addition, with one exception there are no restrictions on the relative magnitudes of the supply voltages or input signals within the device maximum ratings, provided that the input signal swings between VSS and at least 0.7 VCC; VCC may exceed VDD, and input signals may exceed VCC and VDD. When operated in the mode VCC > VDD, the CD40109 will operate as a high-to-low level-shifter.

The CD40109 also features individual three-state output capability. A low level on any of the separately enabled three-state output controls produces a high-impedance state in the corresponding output.

CD40109B contains four low-to-high-voltage level-shifting circuits. Each circuit will shift a low-voltage digital-logic input signal (A, B, C, D) with logical 1 = VCC and logical 0 = VSS to a high-voltage output signal (E, F, G, H) with logical 1 = VDD and logical 0 = VSS.

The RCA-CD40109, unlike other low-to-high level-shifting circuits, does not require the presence of the high-voltage supply (VDD) before the application of either the low-voltage supply (VCC) or the input signals. There are no restrictions on the sequence of application of VDD, VCC, or the input signals. In addition, with one exception there are no restrictions on the relative magnitudes of the supply voltages or input signals within the device maximum ratings, provided that the input signal swings between VSS and at least 0.7 VCC; VCC may exceed VDD, and input signals may exceed VCC and VDD. When operated in the mode VCC > VDD, the CD40109 will operate as a high-to-low level-shifter.

The CD40109 also features individual three-state output capability. A low level on any of the separately enabled three-state output controls produces a high-impedance state in the corresponding output.
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Documentación técnica

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Tipo Título Fecha
* Data sheet CD40109B-Q1 CMOS Quad Low-to-High Voltage Level Shifter datasheet (Rev. A) 24 ago 2011
Application brief Leveraging TXH for High Voltage Level Shifting PDF | HTML 28 jul 2023
Selection guide Voltage Translation Buying Guide (Rev. A) 15 abr 2021
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
More literature Automotive Logic Devices Brochure 27 ago 2014
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
User guide Signal Switch Data Book (Rev. A) 14 nov 2003
Application note Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics 03 dic 2001

Diseño y desarrollo

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Placa de evaluación

14-24-LOGIC-EVM — Módulo de evaluación genérico de productos lógicos para encapsulados D, DB, DGV, DW, DYY, NS y PW de

El módulo de evaluación 14-24-LOGIC-EVM (EVM) está diseñado para admitir cualquier dispositivo lógico que esté en un encapsulado D, DW, DB, NS, PW, DYY o DGV de 14 a 24 pines.

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SOP (NS) 16 Ver opciones
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Pedidos y calidad

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  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
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