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Circuitos integrados LVDS, M-LVDS y PECL

DS15BR401

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Búfer/repetidor LVDS de 4 canales con énfasis previo

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DS15BR401

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Detalles del producto

Function Buffer Protocols CML, LVDS, LVPECL Number of transmitters 4 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (MBits) 2000 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Buffer Protocols CML, LVDS, LVPECL Number of transmitters 4 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (MBits) 2000 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
TQFP (PFB) 48 81 mm² 9 x 9 WQFN (RTV) 32 25 mm² 5 x 5
  • DC to 2 Gbps Low Jitter, High Noise Immunity, Low Power Operation
  • 6 dB of Pre-emphasis Drives Lossy Backplanes and Cables
  • LVDS/CML/LVPECL Compatible Input, LVDS Output
  • On-chip 100 Ω output termination, optional 100 Ω Input Termination
  • 15 kV ESD Protection on LVDS Inputs and Outputs
  • Single 3.3V Supply
  • Industrial -40 to +85°C Temperature Range
  • Space Saving WQFN-32 or TQFP-48 Packages

All trademarks are the property of their respective owners.

  • DC to 2 Gbps Low Jitter, High Noise Immunity, Low Power Operation
  • 6 dB of Pre-emphasis Drives Lossy Backplanes and Cables
  • LVDS/CML/LVPECL Compatible Input, LVDS Output
  • On-chip 100 Ω output termination, optional 100 Ω Input Termination
  • 15 kV ESD Protection on LVDS Inputs and Outputs
  • Single 3.3V Supply
  • Industrial -40 to +85°C Temperature Range
  • Space Saving WQFN-32 or TQFP-48 Packages

All trademarks are the property of their respective owners.

The DS15BR400/DS15BR401 are four channel LVDS buffer/repeaters capable of data rates of up to 2 Gbps. High speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while pre-emphasis overcomes ISI jitter effects from lossy backplanes and cables. The differential inputs interface to LVDS, and Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The differential inputs and outputs of the DS15BR400 are internally terminated with 100Ω resistors to improve performance and minimize board space. The DS15BR401 does not have input termination resistors. The repeater function is especially useful for boosting signals for longer distance transmission over lossy cables and backplanes.

The DS15BR400/DS15BR401 are powered from a single 3.3V supply and consume 578 mW (typ). They operate over the full -40°C to +85°C industrial temperature range and are available in space saving WQFN-32 and TQFP-48 packages.

The DS15BR400/DS15BR401 are four channel LVDS buffer/repeaters capable of data rates of up to 2 Gbps. High speed data paths and flow-through pinout minimize internal device jitter and simplify board layout, while pre-emphasis overcomes ISI jitter effects from lossy backplanes and cables. The differential inputs interface to LVDS, and Bus LVDS signals such as those on TI's 10-, 16-, and 18- bit Bus LVDS SerDes, as well as CML and LVPECL. The differential inputs and outputs of the DS15BR400 are internally terminated with 100Ω resistors to improve performance and minimize board space. The DS15BR401 does not have input termination resistors. The repeater function is especially useful for boosting signals for longer distance transmission over lossy cables and backplanes.

The DS15BR400/DS15BR401 are powered from a single 3.3V supply and consume 578 mW (typ). They operate over the full -40°C to +85°C industrial temperature range and are available in space saving WQFN-32 and TQFP-48 packages.
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Documentación técnica

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* Data sheet DS15BR400/DS15BR401 4-Channel LVDS Buffer/Repeater with Pre-Emphasis datasheet (Rev. G) 12 abr 2013

Diseño y desarrollo

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Modelo de simulación

DS15BR401 IBIS Model

SNLM094.ZIP (12 KB) - IBIS Model
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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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WQFN (RTV) 32 Ver opciones
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Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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