Inicio Interfaz Circuitos integrados LVDS, M-LVDS y PECL

SN65MLVD129

ACTIVO

1:4 Repetidor dual LVTTL a M-LVDS

Detalles del producto

Function Driver, Repeater, Translator Protocols M-LVDS Number of transmitters 8 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (MBits) 250 Input signal LVTTL Output signal M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver, Repeater, Translator Protocols M-LVDS Number of transmitters 8 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (MBits) 250 Input signal LVTTL Output signal M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (DGG) 48 101.25 mm² 12.5 x 8.1
  • LVTTL Receiver and Eight Line Drivers Configured as an 8-Port M-LVDS Repeater—SN65MLVD128
  • 2 LVTTL Receivers and Eight Line Drivers Configured as Dual 4-Port M-LVDS Repeaters—SN65MLVD129
  • Drivers Meet or Exceed the M-LVDS Standard (TIA/EIA-899)
  • Low-Voltage Differential 30- Line Drivers for Data Rates¹ Up to 250 Mbps or Clock Frequencies Up to 125 MHz
  • Power Up/Down Glitch Free
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5 V
  • Independent Enables for each Driver
  • Output-to-Ouput Skew tsk(o) ≤ 160 ps
       Part-to-Part Skew tsk(pp) ≤ 800 ps
  • Single 3.3-V Voltage Supply
  • Bus Pin ESD Protection Exceeds 9 kV
  • Packaged in 48-Pin TSSOP (DGG)
  • APPLICATIONS
    • AdvancedTCA™ (ATCA™) Clock Bus Driver
    • Clock Distribution
    • Data and Clock Repeating Over Backplanes and Cables
    • Cellular Base Stations
    • Central Office Switches
    • Network Switches and Routers

¹The data rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
AdvancedTCA and ATCA are trademarks of the PCI Industrial Computer Manufacturers Group.

  • LVTTL Receiver and Eight Line Drivers Configured as an 8-Port M-LVDS Repeater—SN65MLVD128
  • 2 LVTTL Receivers and Eight Line Drivers Configured as Dual 4-Port M-LVDS Repeaters—SN65MLVD129
  • Drivers Meet or Exceed the M-LVDS Standard (TIA/EIA-899)
  • Low-Voltage Differential 30- Line Drivers for Data Rates¹ Up to 250 Mbps or Clock Frequencies Up to 125 MHz
  • Power Up/Down Glitch Free
  • Controlled Driver Output Voltage Transition Times for Improved Signal Quality
  • Bus Pins High Impedance When Disabled or VCC ≤ 1.5 V
  • Independent Enables for each Driver
  • Output-to-Ouput Skew tsk(o) ≤ 160 ps
       Part-to-Part Skew tsk(pp) ≤ 800 ps
  • Single 3.3-V Voltage Supply
  • Bus Pin ESD Protection Exceeds 9 kV
  • Packaged in 48-Pin TSSOP (DGG)
  • APPLICATIONS
    • AdvancedTCA™ (ATCA™) Clock Bus Driver
    • Clock Distribution
    • Data and Clock Repeating Over Backplanes and Cables
    • Cellular Base Stations
    • Central Office Switches
    • Network Switches and Routers

¹The data rate of a line, is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
AdvancedTCA and ATCA are trademarks of the PCI Industrial Computer Manufacturers Group.

The SN65MLVD128 and SN65MLVD129 are LVTTL-to-M.LVDS translators/repeaters. Outputs comply with the M.LVDS standard (TIA/EIA-899) and are optimized for data rates up to 250 Mbps, and clock frequencies up to 125 MHz. The driver outputs have been designed to support multipoint buses presenting loads as low as 30 and incorporates controlled transition times for backbone operation.

M-LVDS compliant devices allow for 32 nodes on a common bus, providing a high-speed replacement for RS-485 devices when lower common-mode voltage range and lower output signaling levels are acceptable. The SN65MLVD128 and SN65MLVD129 provide separate driver enables, allowing for independent control of each output signal.

Intended applications for these devices include transmission of clock signals from a central clock module, as well as translation and buffering of data or control signals for transmission through a controlled impedance backplane or cable.

The SN65MLVD128 and SN65MLVD129 are LVTTL-to-M.LVDS translators/repeaters. Outputs comply with the M.LVDS standard (TIA/EIA-899) and are optimized for data rates up to 250 Mbps, and clock frequencies up to 125 MHz. The driver outputs have been designed to support multipoint buses presenting loads as low as 30 and incorporates controlled transition times for backbone operation.

M-LVDS compliant devices allow for 32 nodes on a common bus, providing a high-speed replacement for RS-485 devices when lower common-mode voltage range and lower output signaling levels are acceptable. The SN65MLVD128 and SN65MLVD129 provide separate driver enables, allowing for independent control of each output signal.

Intended applications for these devices include transmission of clock signals from a central clock module, as well as translation and buffering of data or control signals for transmission through a controlled impedance backplane or cable.

Descargar Ver vídeo con transcripción Video

Documentación técnica

star =Principal documentación para este producto seleccionada por TI
No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.
Ver todo 4
Tipo Título Fecha
* Data sheet SN65MLVD128/129 - 1:8 LVTTL to M-LVDS Repeater, Dual 1:4 LVTTL to M-LVDS Repeate datasheet 04 sep 2003
Application note An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. C) PDF | HTML 22 jun 2023
Application brief How Far, How Fast Can You Operate MLVDS? 06 ago 2018
Application note SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) 20 nov 2001

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

SN65MLVD129 IBIS Model

SLLC207.ZIP (8 KB) - IBIS Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Paquete Pasadores Descargar
TSSOP (DGG) 48 Ver opciones

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI. ​​​​​​​​​​​​​​

Videos