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Circuitos integrados LVDS, M-LVDS y PECL

TB5D1M

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Controlador PECL cuádruple de 5 V

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TB5D1M

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Detalles del producto

Function Driver Protocols PECL Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3, 5 Signaling rate (MBits) 150 Input signal TTL Output signal PECL Rating Catalog Operating temperature range (°C) -40 to 85
Function Driver Protocols PECL Number of transmitters 4 Number of receivers 0 Supply voltage (V) 3.3, 5 Signaling rate (MBits) 150 Input signal TTL Output signal PECL Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6 SOIC (DW) 16 106.09 mm² 10.3 x 10.3
  • Functional Replacements for the Agere BDG1A, BPNGA and BDGLA
  • Pin-Equivalent to the General-Trade 26LS31 Device
  • 2.0 ns Maximum Propagation Delays
  • 0.15 ns Output Skew Typical Between ± Pairs
  • Capable of Driving 50- Loads
  • 5.0-V or 3.3-V Supply Operation
  • TB5D1M Includes Surge Protection on
    Differential Outputs
  • TB5D2H No Line Loading When VCC = 0
  • Third State Output Capability
  • -40°C to 85°C Operating Temp Range
  • ESD Protection HBM > 3 kV and CDM > 2 kV
  • Available in Gull-Wing SOIC (JEDEC MS-013, DW) and SOIC (D) Packages
  • APPLICATIONS
    • Digital Data or Clock Transmission Over
      Balanced Transmission Lines
  • Functional Replacements for the Agere BDG1A, BPNGA and BDGLA
  • Pin-Equivalent to the General-Trade 26LS31 Device
  • 2.0 ns Maximum Propagation Delays
  • 0.15 ns Output Skew Typical Between ± Pairs
  • Capable of Driving 50- Loads
  • 5.0-V or 3.3-V Supply Operation
  • TB5D1M Includes Surge Protection on
    Differential Outputs
  • TB5D2H No Line Loading When VCC = 0
  • Third State Output Capability
  • -40°C to 85°C Operating Temp Range
  • ESD Protection HBM > 3 kV and CDM > 2 kV
  • Available in Gull-Wing SOIC (JEDEC MS-013, DW) and SOIC (D) Packages
  • APPLICATIONS
    • Digital Data or Clock Transmission Over
      Balanced Transmission Lines

These quad differential drivers are TTL input to pseudo-ECL differential output used for digital data transmission over balanced transmission lines.

The TB5D1M device is a pin and functional replacement for the Agere systems BDG1A and BPNGA quad differential drivers. The TB5D1M has a built-in lightning protection circuit to absorb large transitions on the transmission lines without destroying the device. When the circuit is powered down it loads the transmission line, because of the protection circuit.

The TB5D2H device is a pin and functional replacement for the Agere systems BDG1A and BDGLA quad differential drivers. Upon power down the TB5D2H output circuit appears as an open circuit and does not load the transmission line.

Both drivers feature a 3-state output with a third-state level of less than 0.1 V.

The packaging options available for these quad differential line drivers include a 16-pin SOIC gull-wing (DW) and a 16-pin SOIC (D) package.

Both drivers are characterized for operation from -40°C to 85°C

The logic inputs of this device include internal pull-up resistors of approximately 40 k that are connected to VCC to ensure a logical high level input if the inputs are open circuited.

These quad differential drivers are TTL input to pseudo-ECL differential output used for digital data transmission over balanced transmission lines.

The TB5D1M device is a pin and functional replacement for the Agere systems BDG1A and BPNGA quad differential drivers. The TB5D1M has a built-in lightning protection circuit to absorb large transitions on the transmission lines without destroying the device. When the circuit is powered down it loads the transmission line, because of the protection circuit.

The TB5D2H device is a pin and functional replacement for the Agere systems BDG1A and BDGLA quad differential drivers. Upon power down the TB5D2H output circuit appears as an open circuit and does not load the transmission line.

Both drivers feature a 3-state output with a third-state level of less than 0.1 V.

The packaging options available for these quad differential line drivers include a 16-pin SOIC gull-wing (DW) and a 16-pin SOIC (D) package.

Both drivers are characterized for operation from -40°C to 85°C

The logic inputs of this device include internal pull-up resistors of approximately 40 k that are connected to VCC to ensure a logical high level input if the inputs are open circuited.
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Documentación técnica

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Tipo Título Fecha
* Data sheet TB5D1M, TB5D2H: Quad Differential PECL Drivers datasheet (Rev. C) 18 ene 2008

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

TB5D1M3VD IBIS Model

SLLC165.ZIP (6 KB) - IBIS Model
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Modelo de simulación

TB5D1M3VDW IBIS Model

SLLC166.ZIP (6 KB) - IBIS Model
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Modelo de simulación

TB5D1M5VD IBIS Model

SLLC167.ZIP (7 KB) - IBIS Model
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Modelo de simulación

TB5D1M5VDW IBIS Model

SLLC168.ZIP (7 KB) - IBIS Model
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Modelo de simulación

TB5D1MD IBIS Model 3.3V Operation Only

SLLC194.ZIP (9 KB) - IBIS Model
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Modelo de simulación

TB5D1MD IBIS Model 5V Operation Only

SLLC190.ZIP (9 KB) - IBIS Model
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Modelo de simulación

TB5D1MDW IBIS Model 3.3V Operation Only

SLLC195.ZIP (9 KB) - IBIS Model
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Modelo de simulación

TB5D1MDW IBIS Model 5V Operation Only

SLLC191.ZIP (9 KB) - IBIS Model
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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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SOIC (D) 16 Ver opciones
SOIC (DW) 16 Ver opciones
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

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