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THS6212

ACTIVO

Amplificador de controlador de línea PLC/HPLC de banda ancha diferencial de alta velocidad

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THS6212

ACTIVO
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Detalles del producto

Number of channels 1 Architecture PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 28 BW at Acl (MHz) 285 Acl, min spec gain (V/V) 10 Vn at flatband (typ) (nV√Hz) 2.5 Vn at 1 kHz (typ) (nV√Hz) 9 Iq per channel (typ) (mA) 23 Vos (offset voltage at 25°C) (max) (mV) 12 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 65 Input bias current (max) (pA) 3500000 Offset drift (typ) (µV/°C) 155 GBW (typ) (MHz) 285 Iout (typ) (mA) 665 2nd harmonic (dBc) 86 3rd harmonic (dBc) 101 Frequency of harmonic distortion measurement (MHz) 1
Number of channels 1 Architecture PLC Line Driver Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 10 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 28 BW at Acl (MHz) 285 Acl, min spec gain (V/V) 10 Vn at flatband (typ) (nV√Hz) 2.5 Vn at 1 kHz (typ) (nV√Hz) 9 Iq per channel (typ) (mA) 23 Vos (offset voltage at 25°C) (max) (mV) 12 Rail-to-rail No Features Adjustable BW/IQ/IOUT, Shutdown Rating Catalog Operating temperature range (°C) -40 to 85 CMRR (typ) (dB) 65 Input bias current (max) (pA) 3500000 Offset drift (typ) (µV/°C) 155 GBW (typ) (MHz) 285 Iout (typ) (mA) 665 2nd harmonic (dBc) 86 3rd harmonic (dBc) 101 Frequency of harmonic distortion measurement (MHz) 1
VQFN (RHF) 24 20 mm² 5 x 4
  • Low power consumption:
    • Full-bias mode: 23 mA
    • Mid-bias mode: 17.5 mA
    • Low-bias mode: 11.9 mA
    • Low-power shutdown mode
    • IADJ pin for variable bias
  • Low noise:
    • Voltage noise: 2.5 nV/√Hz
    • Inverting current noise: 18 pA/√Hz
    • Noninverting current noise: 1.4 pA/√Hz
  • Low distortion:
    • –86-dBc HD2 (1-MHz, 100-Ω differential load)
    • –101-dBc HD3 (1-MHz, 100-Ω differential load)
  • High output current: > 665 mA (25-Ω load)
  • Wide output swing:
    • 49 VPP ( 28-V, 100-Ω differential load)
  • Wide bandwidth: 205 MHz (GDIFF = 10 V/V)
  • PSRR: >55 dB at 1 MHz for good isolation
  • Wide power-supply range: 10 V to 28 V
  • Thermal protection: 175°C (typical)
  • Alternative device with integrated common-mode buffer: THS6222
  • Low power consumption:
    • Full-bias mode: 23 mA
    • Mid-bias mode: 17.5 mA
    • Low-bias mode: 11.9 mA
    • Low-power shutdown mode
    • IADJ pin for variable bias
  • Low noise:
    • Voltage noise: 2.5 nV/√Hz
    • Inverting current noise: 18 pA/√Hz
    • Noninverting current noise: 1.4 pA/√Hz
  • Low distortion:
    • –86-dBc HD2 (1-MHz, 100-Ω differential load)
    • –101-dBc HD3 (1-MHz, 100-Ω differential load)
  • High output current: > 665 mA (25-Ω load)
  • Wide output swing:
    • 49 VPP ( 28-V, 100-Ω differential load)
  • Wide bandwidth: 205 MHz (GDIFF = 10 V/V)
  • PSRR: >55 dB at 1 MHz for good isolation
  • Wide power-supply range: 10 V to 28 V
  • Thermal protection: 175°C (typical)
  • Alternative device with integrated common-mode buffer: THS6222

The THS6212 is a differential line-driver amplifier with a current-feedback architecture. The device is targeted for use in broadband, wideband power line communications (PLC) line driver applications and is fast enough to support transmissions of 14.5-dBm line power up to 30 MHz.

The unique architecture of the THS6212 uses minimal quiescent current and still achieves very high linearity. Differential distortion under full bias conditions is –86-dBc at 1 MHz and reduces to only –71 dBc at 10 MHz. Fixed multiple bias settings allow for enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, an adjustable current pin (IADJ) is available to further lower the bias currents.

The wide output swing of 49 VPP (100-Ω differential load) with 28-V power supplies, coupled with over a 650-mA current drive (25-Ω load), allows for wide dynamic headroom that keeps distortion minimal.

The THS6212 is available in a 24-pin VQFN package.

The THS6212 is a differential line-driver amplifier with a current-feedback architecture. The device is targeted for use in broadband, wideband power line communications (PLC) line driver applications and is fast enough to support transmissions of 14.5-dBm line power up to 30 MHz.

The unique architecture of the THS6212 uses minimal quiescent current and still achieves very high linearity. Differential distortion under full bias conditions is –86-dBc at 1 MHz and reduces to only –71 dBc at 10 MHz. Fixed multiple bias settings allow for enhanced power savings for line lengths where the full performance of the amplifier is not required. To allow for even more flexibility and power savings, an adjustable current pin (IADJ) is available to further lower the bias currents.

The wide output swing of 49 VPP (100-Ω differential load) with 28-V power supplies, coupled with over a 650-mA current drive (25-Ω load), allows for wide dynamic headroom that keeps distortion minimal.

The THS6212 is available in a 24-pin VQFN package.
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Documentación técnica

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* Data sheet THS6212 Differential Broadband PLC Line Driver Amplifier datasheet (Rev. E) PDF | HTML 25 may 2021
E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 mar 2017
Application note Noise Analysis for High Speed Op Amps (Rev. A) 17 ene 2005

Diseño y desarrollo

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Placa de evaluación

THS6212EVM — THS6212 Módulo de evaluación

The THS6212 Evaluation module (EVM) is used to evaluate the THS6212, which is single-port current-feedback architecture, differential line driver amplifier system in a 24-pin QFN package. The EVM is designed to quickly and easily demonstrate the functionality and performance of THS6212 in a gain (...)
Guía del usuario: PDF
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Modelo de simulación

THS6212 PSpice Model

SBOMBP7.ZIP (62 KB) - PSpice Model
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Modelo de simulación

THS6212 TINA-TI Reference Design

SBOM980.TSC (353 KB) - TINA-TI Reference Design
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Modelo de simulación

THS6212 TINA-TI Spice Model

SBOM981.ZIP (11 KB) - TINA-TI Spice Model
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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
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VQFN (RHF) 24 Ver opciones
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Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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