Inicio Interfaz Circuitos integrados USB Concentradores y controladores USB
Inicio
Interfaz
Circuitos integrados USB
Concentradores y controladores USB

TUSB1310A

NO RECOMENDADO PARA NUEVOS DISEÑOS

Transceptor USB 3.0 SuperSpeed de 5 Gbps con interfaces PIPE y ULPI

Haga su pedido ahora
Hoja de datos
Errata

TUSB1310A

NO RECOMENDADO PARA NUEVOS DISEÑOS
Hoja de datos Haga su pedido ahora

Detalles del producto

Function USB2 USB speed (MBits) 5000 Type Transceiver Rating Catalog Operating temperature range (°C) -40 to 85
Function USB2 USB speed (MBits) 5000 Type Transceiver Rating Catalog Operating temperature range (°C) -40 to 85
NFBGA (ZAY) 175 144 mm² 12 x 12
  • Universal Serial Bus (USB)
    • Single Port 5.0-Gbps USB 3.0 Physical Layer Transceiver
      • One 5.0-Gbps SuperSpeed Connection
      • One 480-Mbps HS/FS/LS Connection
    • Fully Compliant With USB 3.0 Specification, Revision 1.0
    • Supports 3+ Meters USB 3.0 Cable Length
    • Fully Adaptive Equalizer to Optimize Receiver Sensitivity
    • PIPE to Link-Layer Controller
      • Supports 16-Bit SDR Mode at 250 MHz
      • Compliant With PHY Interface for the USB Architectures (PIPE), Version 3.0
    • ULPI to Link-Layer Controller
      • Supports 8-Bit SDR Mode at 60 MHz
      • Supports Synchronous Mode and Low-Power Mode
      • Compliant With UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1
  • General Features
    • IEEE 1149.1 JTAG Support
    • IEEE 1149.6 JTAG support for the SuperSpeed Port
    • Operates on One Reference Clock of 40 MHz
    • 3.3-, 1.8-, and 1.1-V Supply Voltages
    • 1.8-V PIPE and ULPI I/O
    • Available in Lead-Free 175-Ball 12- × 12-nF NFBGA Package (ZAY)
  • Universal Serial Bus (USB)
    • Single Port 5.0-Gbps USB 3.0 Physical Layer Transceiver
      • One 5.0-Gbps SuperSpeed Connection
      • One 480-Mbps HS/FS/LS Connection
    • Fully Compliant With USB 3.0 Specification, Revision 1.0
    • Supports 3+ Meters USB 3.0 Cable Length
    • Fully Adaptive Equalizer to Optimize Receiver Sensitivity
    • PIPE to Link-Layer Controller
      • Supports 16-Bit SDR Mode at 250 MHz
      • Compliant With PHY Interface for the USB Architectures (PIPE), Version 3.0
    • ULPI to Link-Layer Controller
      • Supports 8-Bit SDR Mode at 60 MHz
      • Supports Synchronous Mode and Low-Power Mode
      • Compliant With UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1
  • General Features
    • IEEE 1149.1 JTAG Support
    • IEEE 1149.6 JTAG support for the SuperSpeed Port
    • Operates on One Reference Clock of 40 MHz
    • 3.3-, 1.8-, and 1.1-V Supply Voltages
    • 1.8-V PIPE and ULPI I/O
    • Available in Lead-Free 175-Ball 12- × 12-nF NFBGA Package (ZAY)

The TUSB1310A device is one port, 5.0-Gbps USB 3.0 physical layer transceiver that operates off of one reference clock, which is provided by either a crystal or an external reference clock. The reference clock frequencies are selectable from 20, 25, 30, and 40 MHz. The TUSB1310A device provides the clock to the USB controller. The use of one reference clock allows the TUSB1310A device to provide a cost-effective USB 3.0 solution with few external components and a low implementation cost.

The USB controller interfaces to the TUSB1310A device through a PIPE (SuperSpeed) and a ULPI (USB 2.0) interface. The 16-bit PIPE operates off of a 250-MHz interface clock. The ULPI supports 8-bit operations with a 60-MHz interface clock.

USB 3.0 reduces active and idle power consumption with improved power-management features. The low-power states of the TUSB1310A device are controlled by the USB controller through the PIPE interface.

SuperSpeed USB uses existing USB software infrastructure by keeping the existing software interfaces and software drivers intact. In addition, SuperSpeed USB retains backward compatibility with USB 2.0 based products by using the same form-factor Type-A connector and cables. Existing USB 2.0 devices work with new USB 3.0 hosts and new USB 3.0 devices with work with legacy USB 2.0 hosts.

The TUSB1310A device is one port, 5.0-Gbps USB 3.0 physical layer transceiver that operates off of one reference clock, which is provided by either a crystal or an external reference clock. The reference clock frequencies are selectable from 20, 25, 30, and 40 MHz. The TUSB1310A device provides the clock to the USB controller. The use of one reference clock allows the TUSB1310A device to provide a cost-effective USB 3.0 solution with few external components and a low implementation cost.

The USB controller interfaces to the TUSB1310A device through a PIPE (SuperSpeed) and a ULPI (USB 2.0) interface. The 16-bit PIPE operates off of a 250-MHz interface clock. The ULPI supports 8-bit operations with a 60-MHz interface clock.

USB 3.0 reduces active and idle power consumption with improved power-management features. The low-power states of the TUSB1310A device are controlled by the USB controller through the PIPE interface.

SuperSpeed USB uses existing USB software infrastructure by keeping the existing software interfaces and software drivers intact. In addition, SuperSpeed USB retains backward compatibility with USB 2.0 based products by using the same form-factor Type-A connector and cables. Existing USB 2.0 devices work with new USB 3.0 hosts and new USB 3.0 devices with work with legacy USB 2.0 hosts.
open-in-new Buscar otro/a Concentradores y controladores USB
Descargar Ver vídeo con transcripción Video

Documentación técnica

star =Principal documentación para este producto seleccionada por TI
No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.
Ver todo 4
Tipo Título Fecha
* Data sheet TUSB1310A USB 3.0 Transceiver datasheet (Rev. G) PDF | HTML 12 nov 2017
* Errata TUSB1310A Errata 26 ene 2011
White paper A Primer on USB Type-C and Power Delivery Applications and Requirements (Rev. B) PDF | HTML 25 mar 2022
Application note TUSB1310 Implementation Guide 18 jun 2010

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

TUSB1310A IBIS Model

SLLM160.ZIP (1540 KB) - IBIS Model
Descargar
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Solicitar
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Ver opciones
Paquete Pasadores Descargar
NFBGA (ZAY) 175 Ver opciones
Se aplican los Términos y condiciones estándar de TI para los elementos de evaluación.

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

Ver todos los temas del foro en inglés

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI. ​​​​​​​​​​​​​​

Videos