CD74HC138-Q1

Name: CD74HC138-Q1
Brand: TI
SKU: CD74HC138-Q1
Price: 0.181 USD

활성

오토모티브 카탈로그 고속 CMOS 로직 3-8라인 디코더 디멀티플렉서 및 비인버팅

지금 주문

데이터시트

document-pdfAcrobat High-Speed CMOS Logic 3- to 8-Line Inverting Decoder/Demultiplexer datasheet (Rev. A) (영어)

CD74HC138-Q1

활성

데이터시트

지금 주문

제품 상세 정보

Technology family

HC

Number of channels

1

Operating temperature range (°C)

-40 to 125

Rating

Automotive

Supply current (max) (µA)

160

Technology family

HC

Number of channels

1

Operating temperature range (°C)

-40 to 125

Rating

Automotive

Supply current (max) (µA)

160

SOIC (D)

16

59.4 mm² 9.9 x 6

Qualified for Automotive Applications
Select One of Eight Data Outputs Active Low
I/O Port or Memory Selector
Three Enable Inputs to Simplify Cascading
Typical Propagation Delay of 13 ns at V_CC = 5 V, C_L = 15 pF, T_A = 25°C
Fanout (Over Temperature Range)
- Standard Outputs . . . 10 LSTTL Loads
- Bus Driver Outputs . . . 15 LSTTL Loads
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
2-V to 6-V V_CC Operation
High Noise Immunity; N_IL or N_IH = 30% of V_CC, V_CC = 5 V

Qualified for Automotive Applications
Select One of Eight Data Outputs Active Low
I/O Port or Memory Selector
Three Enable Inputs to Simplify Cascading
Typical Propagation Delay of 13 ns at V_CC = 5 V, C_L = 15 pF, T_A = 25°C
Fanout (Over Temperature Range)
- Standard Outputs . . . 10 LSTTL Loads
- Bus Driver Outputs . . . 15 LSTTL Loads
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
2-V to 6-V V_CC Operation
High Noise Immunity; N_IL or N_IH = 30% of V_CC, V_CC = 5 V

The CD74HC138 is a high-speed silicon-gate CMOS decoder well suited to memory address decoding or data routing applications. This circuit features low power consumption usually associated with CMOS circuitry, yet has speeds comparable to low-power Schottky TTL logic. The circuit has three binary select inputs (A0, A1, and A2). If the device is enabled, these inputs determine which one of the eight normally high outputs of the HC138 will go low.

Two active-low and one active-high enables (E1, E2, and E3) are provided to ease the cascading of decoders. The decoder’s eight outputs can drive ten low-power Schottky TTL equivalent loads.

The CD74HC138 is a high-speed silicon-gate CMOS decoder well suited to memory address decoding or data routing applications. This circuit features low power consumption usually associated with CMOS circuitry, yet has speeds comparable to low-power Schottky TTL logic. The circuit has three binary select inputs (A0, A1, and A2). If the device is enabled, these inputs determine which one of the eight normally high outputs of the HC138 will go low.

Two active-low and one active-high enables (E1, E2, and E3) are provided to ease the cascading of decoders. The decoder’s eight outputs can drive ten low-power Schottky TTL equivalent loads.

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기타 디지탈 디멀티플렉서 및 디코더 찾기

다운로드 스크립트와 함께 비디오 보기 동영상

관심 가지실만한 유사 제품

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대안 비교

비교 대상 장치보다 업그레이드된 기능을 지원하는 즉각적 대체품

SN74HCS138-Q1

활성

오토모티브 3라인~8라인 디코더/디멀티플렉서 Schmitt trigger inputs for increased noise immunity

기술 문서

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모두 보기15

	유형	직함	날짜
*	Data sheet	High-Speed CMOS Logic 3- to 8-Line Inverting Decoder/Demultiplexer datasheet (Rev. A)	2008/04/24
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)	2021/07/26
	Selection guide	Logic Guide (Rev. AB)	2017/06/12
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	2015/12/02
	More literature	Automotive Logic Devices Brochure	2014/08/27
	User guide	LOGIC Pocket Data Book (Rev. B)	2007/01/16
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	2004/07/08
	User guide	Signal Switch Data Book (Rev. A)	2003/11/14
	Application note	TI IBIS File Creation, Validation, and Distribution Processes	2002/08/29
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)	1997/06/01
	Application note	Designing With Logic (Rev. C)	1997/06/01
	Application note	Input and Output Characteristics of Digital Integrated Circuits	1996/10/01
	Application note	Live Insertion	1996/10/01
	Application note	SN54/74HCT CMOS Logic Family Applications and Restrictions	1996/05/01
	Application note	Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc	1996/04/01

설계 및 개발

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평가 보드

14-24-LOGIC-EVM — 14핀~24핀 D, DB, DGV, DW, DYY, NS 및 PW 패키지용 로직 제품 일반 평가 모듈

14-24-LOGIC-EVM 평가 모듈(EVM)은 14핀~24핀 D, DW, DB, NS, PW, DYY 또는 DGV 패키지에 있는 모든 로직 장치를 지원하도록 설계되었습니다.

사용 설명서: PDF | HTML

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패키지	핀	다운로드
SOIC (D)	16	옵션 보기

TI의 평가 항목에 대한 표준 약관이 적용됩니다.

CD74HC138-Q1

오토모티브 카탈로그 고속 CMOS 로직 3-8라인 디코더 디멀티플렉서 및 비인버팅

CD74HC138-Q1

제품 상세 정보

관심 가지실만한 유사 제품

비교 대상 장치보다 업그레이드된 기능을 지원하는 즉각적 대체품

기술 문서

설계 및 개발

14-24-LOGIC-EVM — 14핀~24핀 D, DB, DGV, DW, DYY, NS 및 PW 패키지용 로직 제품 일반 평가 모듈

주문 및 품질

지원 및 교육

TI 엔지니어의 기술 지원을 받을 수 있는 TI E2E™ 포럼

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