제품 상세 정보

Resolution (Bits) 14 Number of DAC channels 1 Interface type Parallel LVDS Sample/update rate (Msps) 2400 Features Ultra High Speed Rating Space Interpolation 1x, 2x Power consumption (typ) (mW) 2000 SFDR (dB) 55 Architecture Current Sink Operating temperature range (°C) -55 to 125 Reference type Int
Resolution (Bits) 14 Number of DAC channels 1 Interface type Parallel LVDS Sample/update rate (Msps) 2400 Features Ultra High Speed Rating Space Interpolation 1x, 2x Power consumption (typ) (mW) 2000 SFDR (dB) 55 Architecture Current Sink Operating temperature range (°C) -55 to 125 Reference type Int
CBGA (GEM) 192 361 mm² 19 x 19
  • 14-Bit Resolution
  • 2.4-GSPS Max Update Rate DAC
  • Dual Differential Input Ports
    • Even/Odd Demultiplexed Data
    • Maximum 1.2 GSPS Each Port,
      2.4 GSPS Total
    • Dual 14-Bit Inputs + 1 Reference
      Bit
    • DDR Output Clock
    • DLL Optimized Clock Timing
      Synchronized to Reference Bit
    • LVDS and HyperTransport
      Voltage Level Compatible
    • Internal 100-Ω Terminations for
      Data and Reference Bit Inputs
  • Selectable 2× Interpolation With
    Fs / 2 Mixing
  • Differential Scalable Current Outputs:
    5 to 30 mA
  • On-Chip 1.2-V Reference
  • 3.3-V Analog Supply Operation
  • Power Dissipation: 2 W
  • 192-Ball CBGA (GEM) Package
  • QML-V Qualified, SMD 5962-07247
  • Military Temperature Range (–55°C to
    125°C Tcase)
  • APPLICATIONS
    • Test and Measurement: Arbitrary
      Waveform Generator
    • Communications
    • Engineering evaluation (/EM) samples
      are available(1)

(1) These units are intended for engineering evaluation only. They are processed to a non-compliant flow (that is, no burn-in, and so forth) and are tested to a temperature rating of 25°C only. These units are not suitable for qualification, production, radiation testing, or flight use. Parts are not warranted for performance over the full MIL specified temperature range of –55°C to 125°C or operating life.
All other trademarks are the property of their respective owners.

  • 14-Bit Resolution
  • 2.4-GSPS Max Update Rate DAC
  • Dual Differential Input Ports
    • Even/Odd Demultiplexed Data
    • Maximum 1.2 GSPS Each Port,
      2.4 GSPS Total
    • Dual 14-Bit Inputs + 1 Reference
      Bit
    • DDR Output Clock
    • DLL Optimized Clock Timing
      Synchronized to Reference Bit
    • LVDS and HyperTransport
      Voltage Level Compatible
    • Internal 100-Ω Terminations for
      Data and Reference Bit Inputs
  • Selectable 2× Interpolation With
    Fs / 2 Mixing
  • Differential Scalable Current Outputs:
    5 to 30 mA
  • On-Chip 1.2-V Reference
  • 3.3-V Analog Supply Operation
  • Power Dissipation: 2 W
  • 192-Ball CBGA (GEM) Package
  • QML-V Qualified, SMD 5962-07247
  • Military Temperature Range (–55°C to
    125°C Tcase)
  • APPLICATIONS
    • Test and Measurement: Arbitrary
      Waveform Generator
    • Communications
    • Engineering evaluation (/EM) samples
      are available(1)

(1) These units are intended for engineering evaluation only. They are processed to a non-compliant flow (that is, no burn-in, and so forth) and are tested to a temperature rating of 25°C only. These units are not suitable for qualification, production, radiation testing, or flight use. Parts are not warranted for performance over the full MIL specified temperature range of –55°C to 125°C or operating life.
All other trademarks are the property of their respective owners.

The DAC5670 is a 14-bit 2.4-GSPS DAC with dual demultiplexed differential input ports. The DAC5670 is clocked at the DAC sample rate and the two input ports run at a maximum of 1.2 GSPS. An additional reference bit input sequence is used to adjust the output clock delay to the data source, optimizing the internal data latching clock relative to this reference bit with a delay lock loop (DLL). Alternatively, the DLL may be bypassed and the timing interface managed by controlling DATA setup and hold timing to DLYCLK.

The DAC5670 can also accept data up to 1.2 GSPS using only the A input port. In the single port modes, options include: repeating the input sample (A_ONLY mode), 2× interpolation by zero stuff (A_ONLY_ZS mode), or 2× interpolation by repeating and inverting the input sample (A_ONLY_INV). These modes are used to double the input sample rate up to 2.4 GSPS.

The DAC5670 operates with a single 3- to 3.6-V supply voltage. Power dissipation is 2 W at maximum operating conditions. The DAC5670 provides a nominal full-scale differential current-output of 20 mA, supporting both single-ended and differential applications. An on-chip 1.2-V temperature-compensated bandgap reference and control amplifier allows the user to adjust the full-scale output current from the nominal 20 mA to as low as 5 mA or as high as 30 mA.

The output current can be directly fed to the load with no additional external output buffer required. The device has been specifically designed for a differential transformer-coupled output with a 50-Ω doubly-terminated load.

The DAC5670 is available in a 192-ball CBGA package. The device is characterized for operation over the military temperature range (–55°C to 125°C Tcase).

The DAC5670 is a 14-bit 2.4-GSPS DAC with dual demultiplexed differential input ports. The DAC5670 is clocked at the DAC sample rate and the two input ports run at a maximum of 1.2 GSPS. An additional reference bit input sequence is used to adjust the output clock delay to the data source, optimizing the internal data latching clock relative to this reference bit with a delay lock loop (DLL). Alternatively, the DLL may be bypassed and the timing interface managed by controlling DATA setup and hold timing to DLYCLK.

The DAC5670 can also accept data up to 1.2 GSPS using only the A input port. In the single port modes, options include: repeating the input sample (A_ONLY mode), 2× interpolation by zero stuff (A_ONLY_ZS mode), or 2× interpolation by repeating and inverting the input sample (A_ONLY_INV). These modes are used to double the input sample rate up to 2.4 GSPS.

The DAC5670 operates with a single 3- to 3.6-V supply voltage. Power dissipation is 2 W at maximum operating conditions. The DAC5670 provides a nominal full-scale differential current-output of 20 mA, supporting both single-ended and differential applications. An on-chip 1.2-V temperature-compensated bandgap reference and control amplifier allows the user to adjust the full-scale output current from the nominal 20 mA to as low as 5 mA or as high as 30 mA.

The output current can be directly fed to the load with no additional external output buffer required. The device has been specifically designed for a differential transformer-coupled output with a 50-Ω doubly-terminated load.

The DAC5670 is available in a 192-ball CBGA package. The device is characterized for operation over the military temperature range (–55°C to 125°C Tcase).

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기술 문서

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모두 보기8
유형 직함 날짜
* Data sheet DAC5670-SP 14-Bit 2.4-GSPS Digital-to-Analog Converter (DAC) datasheet (Rev. F) PDF | HTML 2014/10/31
* SMD DAC5670-SP SMD 5962-07247 2016/07/08
* Radiation & reliability report DAC5670 Radiation Test Report 2015/03/31
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. A) 2023/08/31
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. A) PDF | HTML 2022/11/17
Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 2022/10/19
Selection guide TI Space Products (Rev. I) 2022/03/03
E-book Radiation Handbook for Electronics (Rev. A) 2019/05/21

설계 및 개발

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시뮬레이션 모델

DAC5670-SP IBIS MODEL

SLAM280.ZIP (11 KB) - IBIS Model
시뮬레이션 툴

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TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
패키지 다운로드
CBGA (GEM) 192 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
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  • 조립 위치

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