인터페이스 직렬 디지털 인터페이스(SDI) IC

LMH0346

활성

듀얼 차동 출력을 지원하는 3G HD/SD SDI 리클로커

제품 상세 정보

Function Reclocker Supply voltage (V) 3.3 Power consumption (mW) 365 Data rate (max) (Mbps) 2970 Control interface Pin, SMBus Operating temperature range (°C) -40 to 85
Function Reclocker Supply voltage (V) 3.3 Power consumption (mW) 365 Data rate (max) (Mbps) 2970 Control interface Pin, SMBus Operating temperature range (°C) -40 to 85
HTSSOP (PWP) 20 41.6 mm² 6.5 x 6.4 WQFN (NHZ) 24 20 mm² 5 x 4
  • Supports SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) Serial Digital Video Standards
  • Supports 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps Serial Data Rate Operation
  • Supports DVB-ASI at 270 Mbps
  • Single 3.3V Supply Operation
  • 370 mW Typical Power Consumption
  • Two Differential, Reclocked Outputs
  • Choice of Second Reclocked Output or Low-Jitter, Differential, Data-Rate Clock Output
  • Single 27 MHz External Crystal or Reference Clock Input
  • Manual or Automatic Rate Select Input
  • SD/HD Operating Rate Indicator Output
  • Lock Detect Indicator Output
  • Output Mute Function for Data and Clock
  • Auto/Manual Reclocker Bypass
  • Differential LVPECL Compatible Serial Data Inputs and Outputs
  • LVCMOS Control Inputs and Indicator Outputs
  • 20-Pin HTSSOP or 24-Pin WQFN Package
  • Industrial Temperature Range: -40°C to +85°C
  • Footprint Compatible With the LMH0046 and LMH0026 (HTSSOP Package)

All trademarks are the property of their respective owners.

  • Supports SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) Serial Digital Video Standards
  • Supports 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps Serial Data Rate Operation
  • Supports DVB-ASI at 270 Mbps
  • Single 3.3V Supply Operation
  • 370 mW Typical Power Consumption
  • Two Differential, Reclocked Outputs
  • Choice of Second Reclocked Output or Low-Jitter, Differential, Data-Rate Clock Output
  • Single 27 MHz External Crystal or Reference Clock Input
  • Manual or Automatic Rate Select Input
  • SD/HD Operating Rate Indicator Output
  • Lock Detect Indicator Output
  • Output Mute Function for Data and Clock
  • Auto/Manual Reclocker Bypass
  • Differential LVPECL Compatible Serial Data Inputs and Outputs
  • LVCMOS Control Inputs and Indicator Outputs
  • 20-Pin HTSSOP or 24-Pin WQFN Package
  • Industrial Temperature Range: -40°C to +85°C
  • Footprint Compatible With the LMH0046 and LMH0026 (HTSSOP Package)

All trademarks are the property of their respective owners.

The LMH0346 3 Gbps HD/SD SDI Reclocker retimes serial digital video data conforming to the SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) standards. The LMH0346 operates at serial data rates of 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps. The LMH0346 supports DVB-ASI operation at 270 Mbps.

The LMH0346 automatically detects the incoming data rate and adjusts itself to retime the incoming data to suppress accumulated jitter. The LMH0346 recovers the serial data-rate clock and optionally provides it as an output. The LMH0346 has two differential serial data outputs; the second output may be selected as a low-jitter, data-rate clock output. Controls and indicators are: serial clock or second serial data output select, manual rate select input, SD/HD rate indicator output, lock detect output, auto/manual data bypass and output mute. The serial data inputs, outputs, and serial clock outputs are differential LVPECL compatible. The CML serial data and serial clock outputs are suitable for driving 100Ω differentially terminated networks. The control logic inputs and outputs are LVCMOS compatible.

The LMH0346 is powered from a single 3.3V supply. Power dissipation is typically 370 mW.

The device is available in two space-saving packages: a 6.5 X 4.4 mm 20-pin HTSSOP and an even more space–efficient 5 X 4 mm 24-pin WQFN package.

The LMH0346 3 Gbps HD/SD SDI Reclocker retimes serial digital video data conforming to the SMPTE 424M, SMPTE 292M, and SMPTE 259M (C) standards. The LMH0346 operates at serial data rates of 270 Mbps, 1.483 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps. The LMH0346 supports DVB-ASI operation at 270 Mbps.

The LMH0346 automatically detects the incoming data rate and adjusts itself to retime the incoming data to suppress accumulated jitter. The LMH0346 recovers the serial data-rate clock and optionally provides it as an output. The LMH0346 has two differential serial data outputs; the second output may be selected as a low-jitter, data-rate clock output. Controls and indicators are: serial clock or second serial data output select, manual rate select input, SD/HD rate indicator output, lock detect output, auto/manual data bypass and output mute. The serial data inputs, outputs, and serial clock outputs are differential LVPECL compatible. The CML serial data and serial clock outputs are suitable for driving 100Ω differentially terminated networks. The control logic inputs and outputs are LVCMOS compatible.

The LMH0346 is powered from a single 3.3V supply. Power dissipation is typically 370 mW.

The device is available in two space-saving packages: a 6.5 X 4.4 mm 20-pin HTSSOP and an even more space–efficient 5 X 4 mm 24-pin WQFN package.

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기술 문서

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모두 보기12
유형 직함 날짜
* Data sheet LMH0346 3 Gbps HD/SD SDI Reclocker with Dual Differential Outputs datasheet (Rev. J) 2013/04/15
Selection guide Broadcast and Professional Video Interface Solutions (Rev. E) 2017/04/05
Application note AN-1943 Understanding Serial Digital Video Bit Rates (Rev. A) 2013/04/26
Application note AN-1977 LMH0346 Customization with SMBus (Rev. A) 2013/04/26
Application note AN-2004 Replacing the CLC016 Reclocker with the LMH0026 (Rev. A) 2013/04/26
Application note AN-2145 Power Considerations for SDI Products (Rev. B) 2013/04/26
Application note AN-2146 Power Design for SDI and Other Noise-Sensitive Devices (Rev. A) 2013/04/26
User guide SD3GDAEVK User Guide 2013/04/05
User guide 3 Gbps HD SD SDI Reclocker with Dual Differential Outputs Eval Bd User Guide 2012/01/26
Application note High-Speed Board Layout Challenges in FPGA/SDI Sub-Systems 2009/11/12
Application note Reference Clock Loop Through Application 2009/01/16
Design guide Broadcast Video Owner's Manual 2006/11/17

설계 및 개발

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회로도

SD346EVK User Files

SNLC007.ZIP (891 KB)
시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

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시뮬레이션 툴

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TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
사용 설명서: PDF
패키지 다운로드
HTSSOP (PWP) 20 옵션 보기
WQFN (NHZ) 24 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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