인터페이스 I2C & I3C ICs I2C & I3C level shifters, buffers & hubs

PCA9306-Q1

활성

차량용 2비트 양방향 400kHz I2C/SMBus 전압 레벨 트랜스레이터

제품 상세 정보

Features Enable pin Protocols I2C Frequency (max) (MHz) 0.4 VCCA (min) (V) 1.2 VCCA (max) (V) 5.5 VCCB (min) (V) 1.8 VCCB (max) (V) 5.5 Supply restrictions VCCA <= VCCB Rating Automotive Operating temperature range (°C) -40 to 105
Features Enable pin Protocols I2C Frequency (max) (MHz) 0.4 VCCA (min) (V) 1.2 VCCA (max) (V) 5.5 VCCB (min) (V) 1.8 VCCB (max) (V) 5.5 Supply restrictions VCCA <= VCCB Rating Automotive Operating temperature range (°C) -40 to 105
VSSOP (DCU) 8 6.2 mm² 2 x 3.1
  • AEC-Q100 qualified for automotive applications
    • Temperature grade 2: –40°C to 105°C, TA
    • HBM ESD classification level H2
    • CDM ESD classification level C4B
  • 2-Bit bidirectional translator for SDA and SCL lines in mixed-mode I2C applications
  • Compatible with I2C and SMBus
  • Less than 1.5-ns maximum propagation delay to accommodate standard-mode and fast-mode I2C devices and multiple controllers
  • Allows voltage-level translation between
    • 1.2-V VREF1 and 1.8-V, 2.5-V, 3.3-V, or 5-V VREF2
    • 1.8-V VREF1 and 2.5-V, 3.3-V, or 5-V VREF2
    • 2.5-V VREF1 and 3.3-V, or 5-V VREF2
    • 3.3-V VREF1 and 5-V VREF2
  • Provides bidirectional voltage translation with no direction pin
  • Low 3.5-Ω ON-state connection between input and output ports provides less signal distortion
  • Open-drain I2C I/O Ports (SCL1, SDA1, SCL2, and SDA2)
  • 5-V tolerant I2C I/O ports to support mixed-mode signal operation
  • High-impedance SCL1, SDA1, SCL2, and SDA2 pins for EN = low
  • Lock-up-free operation for isolation when EN = Low
  • Flow-through pinout for ease of printed-circuit board trace routing
  • Latch-up performance exceeds 100 mA Per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000-V Human-body model (A114-A)
    • 200-V Machine model (A115-A)
    • 1000-V Charged-device model (C101)
  • AEC-Q100 qualified for automotive applications
    • Temperature grade 2: –40°C to 105°C, TA
    • HBM ESD classification level H2
    • CDM ESD classification level C4B
  • 2-Bit bidirectional translator for SDA and SCL lines in mixed-mode I2C applications
  • Compatible with I2C and SMBus
  • Less than 1.5-ns maximum propagation delay to accommodate standard-mode and fast-mode I2C devices and multiple controllers
  • Allows voltage-level translation between
    • 1.2-V VREF1 and 1.8-V, 2.5-V, 3.3-V, or 5-V VREF2
    • 1.8-V VREF1 and 2.5-V, 3.3-V, or 5-V VREF2
    • 2.5-V VREF1 and 3.3-V, or 5-V VREF2
    • 3.3-V VREF1 and 5-V VREF2
  • Provides bidirectional voltage translation with no direction pin
  • Low 3.5-Ω ON-state connection between input and output ports provides less signal distortion
  • Open-drain I2C I/O Ports (SCL1, SDA1, SCL2, and SDA2)
  • 5-V tolerant I2C I/O ports to support mixed-mode signal operation
  • High-impedance SCL1, SDA1, SCL2, and SDA2 pins for EN = low
  • Lock-up-free operation for isolation when EN = Low
  • Flow-through pinout for ease of printed-circuit board trace routing
  • Latch-up performance exceeds 100 mA Per JESD 78, Class II
  • ESD protection exceeds JESD 22
    • 2000-V Human-body model (A114-A)
    • 200-V Machine model (A115-A)
    • 1000-V Charged-device model (C101)

This dual bidirectional I2C and SMBus voltage-level translator, with an enable (EN) input, is operational from 1.2-V to 3.3-V VREF1 and 1.8-V to 5.5-V VREF2.

The PCA9306-Q1 allows bidirectional voltage translations between 1.2 V and 5 V, without the use of a direction pin. The low ON-state resistance (ron) of the switch allows connections to be made with minimal propagation delay. When EN is high, the translator switch is ON, and the SCL1 and SDA1 I/O are connected to the SCL2 and SDA2 I/O, respectively, allowing bidirectional data flow between ports. When EN is low, the translator switch is off, and a high-impedance state exists between ports.

This dual bidirectional I2C and SMBus voltage-level translator, with an enable (EN) input, is operational from 1.2-V to 3.3-V VREF1 and 1.8-V to 5.5-V VREF2.

The PCA9306-Q1 allows bidirectional voltage translations between 1.2 V and 5 V, without the use of a direction pin. The low ON-state resistance (ron) of the switch allows connections to be made with minimal propagation delay. When EN is high, the translator switch is ON, and the SCL1 and SDA1 I/O are connected to the SCL2 and SDA2 I/O, respectively, allowing bidirectional data flow between ports. When EN is low, the translator switch is off, and a high-impedance state exists between ports.

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기술 문서

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모두 보기11
유형 직함 날짜
* Data sheet PCA9306-Q1 Dual Bidirectional I2C Bus and SMBus Voltage-Level Translator datasheet (Rev. C) PDF | HTML 2022/04/01
Application brief Integrated vs. Discrete Open Drain Level Translation PDF | HTML 2024/01/09
Functional safety information PCA9306-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA PDF | HTML 2021/08/02
Selection guide Logic Guide (Rev. AB) 2017/06/12
Application note Choosing the Correct I2C Device for New Designs PDF | HTML 2016/09/07
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015/12/02
Application note Understanding the I2C Bus PDF | HTML 2015/06/30
Application note Maximum Clock Frequency of I2C Bus Using Repeaters 2015/05/15
Application note I2C Bus Pull-Up Resistor Calculation PDF | HTML 2015/02/13
Application note Programming Fun Lights With TI's TCA6507 2007/11/30
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004/07/08

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

PCA9306EVM — PCA9306 I2C 변환기 평가 모듈

This EVM can be used to evaluate the PCA9306 product in the DCU package. The I2C buses are easily accessed via SDA_1, SCL_1, SDA_2, and SCL_2 test points, and symmetrically laid out for optimal performance. All IC signals are available through test point connections.
사용 설명서: PDF
TI.com에서 구매할 수 없습니다
시뮬레이션 모델

HSPICE MODEL OF PCA9306 (Rev. A)

SCEJ212A.ZIP (81 KB) - HSpice Model
시뮬레이션 모델

PCA9306 IBIS Model (Rev. A)

SCPM002A.ZIP (54 KB) - IBIS Model
설계 툴

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시뮬레이션 툴

PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®

TI용 PSpice®는 아날로그 회로의 기능을 평가하는 데 사용되는 설계 및 시뮬레이션 환경입니다. 완전한 기능을 갖춘 이 설계 및 시뮬레이션 제품군은 Cadence®의 아날로그 분석 엔진을 사용합니다. 무료로 제공되는 TI용 PSpice에는 아날로그 및 전력 포트폴리오뿐 아니라 아날로그 행동 모델에 이르기까지 업계에서 가장 방대한 모델 라이브러리 중 하나가 포함되어 있습니다.

TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
시뮬레이션 툴

TINA-TI — SPICE 기반 아날로그 시뮬레이션 프로그램

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
사용 설명서: PDF
레퍼런스 디자인

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This reference design provides a processing foundation for a cascaded imaging radar system. Cascade radar devices can support front, long-range (LRR) beam-forming applications as well as corner- and side-cascade radar and sensor fusion systems. This reference design provides qualified developers (...)
Design guide: PDF
회로도: PDF
레퍼런스 디자인

TIDA-00271 — 원격 카메라 및 레이더 모듈을 위한 ADAS 센서 상호 연결 레퍼런스 디자인 보드

The ADAS Sensor Interconnect Board is intended for applications where remote sensors like cameras, LIDAR or radar modules need to be connected to a central processing ECU. The board supports up to 3 coaxial and 1 LVDS twisted pair data inputs as well as 3 FMC cable and 1 board to board connector as (...)
Test report: PDF
회로도: PDF
패키지 다운로드
VSSOP (DCU) 8 옵션 보기

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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